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74HCT193PW

Presettable synchronous 4-bit binary up/down counter

The 74HC193; 74HCT193 is a 4-bit synchronous binary up/down counter. Separate up/down clocks, CPU and CPD respectively, simplify operation. The outputs change state synchronously with the LOW-to-HIGH transition of either clock input. If the CPU clock is pulsed while CPD is held HIGH, the device will count up. If the CPD clock is pulsed while CPU is held HIGH, the device will count down. Only one clock input can be held HIGH at any time to guarantee predictable behavior. The device can be cleared at any time by the asynchronous master reset input (MR); it may also be loaded in parallel by activating the asynchronous parallel load input (PL). The terminal count up (TCU) and terminal count down (TCD) outputs are normally HIGH. When the circuit has reached the maximum count state of 15, the next HIGH-to-LOW transition of CPU will cause TCU to go LOW. TCU will stay LOW until CPU goes HIGH again, duplicating the count up clock. Likewise, the TCD output will go LOW when the circuit is in the zero state and the CPD goes LOW. The terminal count outputs can be used as the clock input signals to the next higher order circuit in a multistage counter, since they duplicate the clock waveforms. Multistage counters will not be fully synchronous, since there is a slight delay time difference added for each stage that is added. The counter may be preset by the asynchronous parallel load capability of the circuit. Information present on the parallel data inputs (D0 to D3) is loaded into the counter and appears on the outputs (Q0 to Q3) regardless of the conditions of the clock inputs when the parallel load (PL) input is LOW. A HIGH level on the master reset (MR) input will disable the parallel load gates, override both clock inputs and set all outputs (Q0 to Q3) LOW. If one of the clock inputs is LOW during and after a reset or load operation, the next LOW-to-HIGH transition of that clock will be interpreted as a legitimate signal and will be counted. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features and benefits

  • Wide supply voltage range from 2.0 to 6.0 V

  • CMOS low power dissipation

  • High noise immunity

  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

  • Input levels:

    • For 74HC193: CMOS level

    • For 74HCT193: TTL level

  • Synchronous reversible 4-bit binary counting

  • Asynchronous parallel load

  • Asynchronous reset

  • Expandable without external logic

  • Complies with JEDEC standards:

    • JESD8C (2.7 V to 3.6 V)

    • JESD7A (2.0 V to 6.0 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C.

Parametrics

Type number Product status VCC (V) Output drive capability (mA) Logic switching levels tpd (ns) Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Ψth(j-top) (K/W) Rth(j-c) (K/W) Package name
74HCT193PW Production 4.5 - 5.5 ± 4 TTL 20 low -40~125 101 1.0 27 TSSOP16

PCB Symbol, Footprint and 3D Model

Model Name Description

Package

Type number Orderable part number, (Ordering code (12NC)) Status Marking Package Package information Reflow-/Wave soldering Packing
74HCT193PW 74HCT193PW,118
(935283088118)
Active HCT193 SOT403-1
TSSOP16
(SOT403-1)
SOT403-1 SSOP-TSSOP-VSO-WAVE
SOT403-1_118

Environmental information

Type number Orderable part number Chemical content RoHS RHF-indicator
74HCT193PW 74HCT193PW,118 74HCT193PW rohs rhf rhf
Quality and reliability disclaimer

Documentation (11)

File name Title Type Date
74HC_HCT193 Presettable synchronous 4-bit binary up/down counter Data sheet 2024-03-14
AN11044 Pin FMEA 74HC/74HCT family Application note 2019-01-09
SOT403-1 3D model for products with SOT403-1 package Design support 2020-01-22
hct193 74HCT193 IBIS model IBIS model 2022-10-11
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
TSSOP16_SOT403-1_mk plastic, thin shrink small outline package; 16 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body Marcom graphics 2017-01-28
SOT403-1 plastic, thin shrink small outline package; 16 leads; 5 mm x 4.4 mm x 1.2 mm body Package information 2023-11-08
SOT403-1_118 TSSOP16; Reel pack for SMD, 13"; Q1/T1 product orientation Packing information 2020-04-21
74HCT193PW_Nexperia_Product_Reliability 74HCT193PW Nexperia Product Reliability Quality document 2023-05-29
HCT_USER_GUIDE HC/T User Guide User manual 1997-10-31
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

Support

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Models

File name Title Type Date
hct193 74HCT193 IBIS model IBIS model 2022-10-11
SOT403-1 3D model for products with SOT403-1 package Design support 2020-01-22

PCB Symbol, Footprint and 3D Model

Model Name Description

Ordering, pricing & availability

Type number Orderable part number Ordering code (12NC) Status Packing Packing Quantity Buy online
74HCT193PW 74HCT193PW,118 935283088118 Active SOT403-1_118 2,500 Order product

Sample

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How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74HCT193PW 74HCT193PW,118 935283088118 SOT403-1 Order product