74LVC595APW

8-bit serial-in/serial-out or parallel-out shift register; 3-state

The 74LVC595A is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks.

The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Data is shifted on the positive-going transitions of the SHCP input. The data in the shift register is transferred to the storage register on a positive-going transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register.

The shift register has a serial input (DS) and a serial output (Q7S) for cascading purposes. It is also provided with asynchronous reset input MR (active LOW) for all 8 shift register stages. The storage register has 8 parallel 3-state bus driver outputs. Data in the storage register appears at the output whenever the output enable input (OE) is LOW.

Features

  • 5 V tolerant inputs/outputs for interfacing with 5 V logic
  • Wide supply voltage range from 1.2 V to 3.6 V
  • CMOS low-power consumption
  • Direct interface with TTL levels
  • Balanced propagation delays
  • All inputs have Schmitt-trigger action
  • Complies with JEDEC standard JESD8-B/JESD36
  • ESD protection:
    • HBM JESD22-A114-D exceeds 2000 V
    • CDM JESD22-C101-C exceeds 1000 V
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Target applications

  • Serial-to-parallel data conversion
  • Remote control holding register

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC595APWProduction1.2 - 5.5CMOS/LVTTL+/- 2441808low-40~1251244.453.9TSSOP16

Package

Type numberPackageOutline versionReflow-/Wave solderingPackingStatusMarkingOrderable part number, (Ordering code (12NC))
74LVC595APW
TSSOP16
(SOT403-1)
SOT403-1SSOP-TSSOP-VSO-WAVE
Reel 13" Q1/T1ActiveLVC595A74LVC595APW,118
( 9352 824 71118 )
Bulk PackActiveLVC595A74LVC595APW,112
( 9352 824 71112 )

Quality

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateEFRIFRMTBF (hour)MSLMSL leadfree
74LVC595APW74LVC595APW,11874LVC595APWAlways Pb-free123.83.872.58E811
74LVC595APW74LVC595APW,11274LVC595APWAlways Pb-free123.83.872.58E811
Quality and reliability disclaimer

Documentation (11)

File nameTitleTypeDate
74LVC595A8-bit serial-in/serial-out or parallel-out shift register; 3-stateData sheet2017-04-07
AN240Interfacing 3 Volt and 5 Volt ApplicationsApplication note1995-09-14
AN263Power considerations when using CMOS and BiCMOS logic devicesApplication note2002-02-04
AN11009Pin FMEA for LVC familyApplication note2011-02-04
AN212Package lead inductance considerations in high-speed applicationsApplication note2013-03-13
AN10156Sorting through the low voltage logic mazeApplication note2013-03-13
lvc595a74LVC595A IBIS modelIBIS model2014-10-21
75017285Logic selection guide 2016Selection guide2015-01-07
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT403-1_118TSSOP16; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering code (12NC) ending 118Packing2013-04-08
SOT403-1plastic, thin shrink small outline package; 16 leads; 5 mm x 4.4 mm x 1.1 mm bodyOutline drawing2017-01-31

Support

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Models

File nameTitleTypeDate
lvc595a74LVC595A IBIS modelIBIS model2014-10-21

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