74LVC16373A-Q100; 74LVCH16373A-Q100

16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

The 74LVC16373A-Q100 and 74LVCH16373A-Q100 are 16-bit D-type transparent latches with 3-state outputs. The devices can be used as two 8-bit transparent latches or a single 16-bit transparent latch. The devices feature two latch enables (1LE and 2LE) and two output enables (1OE and 2OE), each controlling 8-bits. When nLE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When nLE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of nLE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the latches. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using I_OFF. The I_OFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Bus hold on the data inputs eliminates the need for external pull-up resistors to hold unused inputs.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

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Features and benefits

Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Overvoltage tolerant inputs to 5.5 V
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power dissipation
MULTIBYTE flow-through standard pinout architecture
Multiple low inductance supply pins for minimum noise and ground bounce
Direct interface with TTL levels
All data inputs have bus hold (74LVCH16373A-Q100 only)
I_OFF circuitry provides partial Power-down mode operation
Complies with JEDEC standards:
- JESD8-7A (1.65 V to 1.95 V)
- JESD8-5A (2.3 V to 2.7 V)
- JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

Parametrics

Type number	Product status	V_CC (V)	Logic switching levels	Output drive capability (mA)	t_pd (ns)	Power dissipation considerations	T_amb (°C)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name
74LVC16373ADGG-Q100	Production	1.2 - 3.6	TTL	± 24	3	low	-40~125	82	2.0	37	TSSOP48
74LVC16373ADGV-Q100	Production	1.2 - 3.6	TTL	± 24	3	low	-40~125	82	2.0	37	TVSOP48
74LVCH16373ADGG-Q100	Production	1.2 - 3.6	TTL	± 24	3	low	-40~125	82	2.0	37	TSSOP48
74LVCH16373ADGV-Q100	Production	1.2 - 3.6	TTL	± 24	3	low	-40~125	82	2.0	37	TVSOP48

Package

Type number	Package	Package information	Reflow-/Wave soldering	Packing	Status	Marking	Orderable part number, (Ordering code (12NC))
74LVC16373ADGG-Q100	TSSOP48 (SOT362-1)	SOT362-1	SSOP-TSSOP-VSO-WAVE	SOT362-1_118	Active	LVC16373A	74LVC16373ADGG-Q1J ( 9353 044 94118 )
74LVC16373ADGV-Q100	TVSOP48 (SOT480-1)	SOT480-1		SOT480-1_118	Active	74LVC16373A	74LVC16373ADGV-Q1J ( 9356 907 93118 )
74LVCH16373ADGG-Q100	TSSOP48 (SOT362-1)	SOT362-1	SSOP-TSSOP-VSO-WAVE	SOT362-1_118	Active	LVCH16373A	74LVCH16373ADGG-QJ ( 9353 048 72118 )
74LVCH16373ADGV-Q100	TVSOP48 (SOT480-1)	SOT480-1		SOT480-1_118	Active	4LVCH16373A	74LVCH16373ADGV-QJ ( 9356 907 99118 )

Environmental information

Type number	Orderable part number	Chemical content	Leadfree conversion date
74LVC16373ADGG-Q100	74LVC16373ADGG-Q1J	74LVC16373ADGG-Q100	Always Pb-free
74LVC16373ADGV-Q100	74LVC16373ADGV-Q1J	74LVC16373ADGV-Q100	week 25, 2019
74LVCH16373ADGG-Q100	74LVCH16373ADGG-QJ	74LVCH16373ADGG-Q100	Always Pb-free
74LVCH16373ADGV-Q100	74LVCH16373ADGV-QJ	74LVCH16373ADGV-Q100	week 25, 2019

Quality and reliability disclaimer

Documentation (7)

File name	Title	Type	Date
AN263	Power considerations when using CMOS and BiCMOS logic devices	Application note	2023-02-07
AN11009	Pin FMEA for LVC family	Application note	2019-01-09
lvc16373a	74LVC16373A IBIS model	IBIS model	2013-04-08
lvch16373a	lvch16373a IBIS model	IBIS model	2013-04-07
SOT480-1	plastic, thin shrink small outline package; 48 leads; 0.4 mm pitch; 9.7 mm x 4.4 mm x 1.1 mm body	Package information	2022-06-22
SSOP-TSSOP-VSO-WAVE	Footprint for wave soldering	Wave soldering	2009-10-08
SOT362-1	plastic thin shrink small outline package; 48 leads; body width 6.1 mm	Package information	2024-01-05

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Models

File name	Title	Type	Date
lvc16373a	74LVC16373A IBIS model	IBIS model	2013-04-08
lvch16373a	lvch16373a IBIS model	IBIS model	2013-04-07

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