74ALVC162334A

16-bit registered driver with inverted register enable and 30 Ohm termination resistors (3-state)

The 74ALVC162334A is a 16-bit universal bus driver. Data flow is controlled by active LOW output enable (OE), active LOW latch enable (LE), and clock input (CP).

When LE is LOW, the A to Y data flow is transparent. When LE is HIGH and CP is held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP, the A data is stored in the latch/flip-flop.

The 74ALVC162334A is designed with 30 Ω series resistors in both HIGH or LOW output stages.

When OE is LOW, the outputs are active. When OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the latch/flip-flop.

To ensure the high-impedance state during power-up or power-down, OE should be tied to V_CC through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Features and benefits

Wide supply voltage range of 1.2 V to 3.6 V
Complies with JEDEC standard 8-1A
CMOS low power consumption
Direct interface with TTL levels
Current drive: ±24 mA at 3.0 V
MULTIBYTE flow-through standard pinout architecture
Low inductance multiple V_CC and GND pins for minimum noise and ground bounce
Output drive capability 50 Ω transmission lines at 85 °C
Integrated 30 Ω termination resistors
Input diodes to accommodate strong drivers

Documentation (3)

File name	Title	Type	Date
74ALVC162334A	16-bit registered driver with inverted register enable and 30 Ohm termination resistors (3-state)	Data sheet	2017-05-10
alv2334a	alv2334a IBIS model	IBIS model	2013-04-07
Nexperia_Selection_guide_2023	Nexperia Selection Guide 2023	Selection guide	2023-05-10

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Models

File name	Title	Type	Date
alv2334a	alv2334a IBIS model	IBIS model	2013-04-07