74LVC4T3144-Q100

4-bit dual supply buffer/line driver; 3-state

The 74LVC4T3144-Q100 is a 4-bit, dual-supply level translating buffer with 3-state outputs. It features four data inputs (An and B4), four data outputs (YBn and YA4), and an output enable input (OE). The device is configured to translate three inputs from V_CC(A) to V_CC(B) and one input from V_CC(B) to V_CC(A). OE, An and YA4 are referenced to V_CC(A) and YBn and B4 are referenced to V_CC(B). A HIGH on OE causes the outputs to assume a high-impedance OFF-state.

The device is fully specified for partial power-down applications using I_OFF. The I_OFF circuitry disables outputs, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either V_CC(A) or V_CC(B) are at GND level, all outputs are in the high-impedance OFF-state.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range:
- V_CC(A): 1.2 V to 5.5 V
- V_CC(B): 1.2 V to 5.5 V
High noise immunity
Maximum data rates:
- 200 Mbps (3.3 V to 5.0 V translation)
- 140 Mbps (translate to 3.3 V))
- 100 Mbps (translate to 2.5 V)
- 75 Mbps (translate to 1.8 V)
- 60 Mbps (translate to 1.5 V)
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78B Class II
±24 mA output drive (V_CC = 3.0 V)
Inputs accept voltages up to 5.5 V
Low power consumption: 30 μA maximum I_CC
I_OFF circuitry provides partial Power-down mode operation
Complies with JEDEC standards:
- JESD8-11A (1.4 V to 1.6 V)
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8C (3.0 V to 3.6 V)
- JESD12-6 (4.5 V to 5.5 V)
ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

Parametrics

Type number	Product status	V_CC(A) (V)	V_CC(B) (V)	Logic switching levels	Output drive capability (mA)	t_pd (ns)	Nr of bits	Power dissipation considerations	T_amb (°C)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name
74LVC4T3144PW-Q100	Production	1.2 - 5.5	1.2 - 5.5	CMOS	± 8	13.2	1	low	-40~125	316	85.8	186	TSSOP14

Package

Type number	Package	Package information	Reflow-/Wave soldering	Packing	Status	Marking	Orderable part number, (Ordering code (12NC))
74LVC4T3144PW-Q100	TSSOP14 (SOT402-1)	SOT402-1	SSOP-TSSOP-VSO-WAVE	SOT402-1_118	Active	C4T3144	74LVC4T3144PW-Q10J ( 9356 901 73118 )

Environmental information

Type number	Orderable part number	Chemical content	RoHS	RHF-indicator	Leadfree conversion date
74LVC4T3144PW-Q100	74LVC4T3144PW-Q10J	74LVC4T3144PW-Q100			week 25, 2019

Quality and reliability disclaimer

Documentation (5)

File name	Title	Type	Date
74LVC4T3144_Q100	4-bit dual supply buffer/line driver; 3-state	Data sheet	2024-02-22
lvc4t3144	74LVC4T3144 IBIS model	IBIS model	2017-08-16
Nexperia_Selection_guide_2023	Nexperia Selection Guide 2023	Selection guide	2023-05-10
SSOP-TSSOP-VSO-WAVE	Footprint for wave soldering	Wave soldering	2009-10-08
SOT402-1	plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body	Package information	2023-11-07

Support

If you are in need of design/technical support, let us know and fill in the answer form, we'll get back to you shortly.

Models

File name	Title	Type	Date
lvc4t3144	74LVC4T3144 IBIS model	IBIS model	2017-08-16

Ordering, pricing & availability

74LVC4T3144PW-Q100

Sample

As a Nexperia customer you can order samples via our sales organization or directly via our Online Sample Store: https://extranet.nexperia.com.

Sample orders normally take 2-4 days for delivery.

If you do not have a direct account with Nexperia our network of global and regional distributors is available and equipped to support you with Nexperia samples.