74AUP1G885GM NRND

Low-power dual function gate

The 74AUP1G885 provides two functions in one device. The output state of the outputs (1Y, 2Y) is determined by the inputs (A, B and C). The output 1Y provides the Boolean function: 1Y = A × C. The output 2Y provides the Boolean function: 2Y = A × B + A × C.

Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

Not recommended for new designs (NRND).
This product has been discontinued, click here for discontinuation information and replacement parts.

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74AUP1G885GM 74AUP1G885GM,125 935280766125 SOT902-2 Order product

Features

  • Wide supply voltage range from 0.8 V to 3.6 V
  • High noise immunity
  • Complies with JEDEC standards:
    • JESD8-12 (0.8 V to 1.3 V)
    • JESD8-11 (0.9 V to 1.65 V)
    • JESD8-7 (1.2 V to 1.95 V)
    • JESD8-5 (1.8 V to 2.7 V)
    • JESD8-B (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F Class 3A exceeds 5000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Latch-up performance exceeds 100 mA per JESD78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Target applications

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AUP1G885GM
NRND
End of life1.1 - 3.6CMOS+/- 1.97.6701ultra low-40~12524516.2134XQFN8

Package

All type numbers in the table below are discontinued. See the table Discontinuation information for more information.

Type numberOrderable part number, (Ordering code (12NC))StatusMarkingPackageOutline versionReflow-/Wave solderingPacking
74AUP1G885GM
NRND
74AUP1G885GM,125
( 9352 807 66125 )
Discontinued / End-of-lifepS8
XQFN8
(SOT902-2)
SOT902-2Reel 7" Q3/T4, Reverse

Discontinuation information

Type numberOrderable part numberlabel.orderingCodeLast time buy dateLast time delivery dateReplacement productStatusComments
74AUP1G885GM
NRND
74AUP1G885GM,1259352807661252019-12-312020-06-3074AUP1G885GSFull withdrawal

Quality, reliability & chemical content

All type numbers in the table below are discontinued. See the table Discontinuation information for more information.

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateMSLMSL leadfree
74AUP1G885GM
NRND
74AUP1G885GM,125Not availableAlways Pb-free11
Quality and reliability disclaimer

Documentation (7)

File nameTitleTypeDate
74AUP1G885Low-power dual function gateData sheet2019-03-14
AN10161PicoGate Logic footprintsApplication note2002-10-29
AN11052Pin FMEA for AUP familyApplication note2019-01-09
aup1g885aup1g885 IBIS modelIBIS model2013-04-07
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Leaflet2019-04-12
SOT902-2_125XQFN8(U); Reel pack, reverse; SMD, 7" Q3/T4 Standard product orientation Orderable part number ending ,125 or H Ordering code (12NC) ending 125Packing2013-05-02
SOT902-2plastic, leadless extremely thin quad flat package; 8 terminals; 0.5 mm pitch; 1.6 mm x 1.6 mm x 0.5 mm bodyOutline drawing2018-11-14

Support

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Models

File nameTitleTypeDate
aup1g885aup1g885 IBIS modelIBIS model2013-04-07