74AUP1T34GS

Low-power dual supply translating buffer

The 74AUP1T34 provides a single buffer with two separate supply voltages. Input A is designed to track VCC(A). Output Y is designed to track VCC(Y). Both, VCC(A) and VCC(Y) accepts any supply voltage from 1.1 V to 3.6 V. This feature allows universal low voltage interfacing between any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V voltage nodes.

Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 1.1 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 1.1 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74AUP1T34GS 74AUP1T34GS,132 935292876132 SOT1202 Order product

Features

  • Wide supply voltage range from 1.1 V to 3.6 V
  • High noise immunity
  • Complies with JEDEC standards:
    • JESD8-7 (1.2 V to 1.95 V)
    • JESD8-5 (1.8 V to 2.7 V)
    • JESD8-B (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F Class 3A exceeds 5000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Wide supply voltage range:
    • VCC(A) : 1.1 V to 3.6 V
    • VCC(Y) : 1.1 V to 3.6 V
  • Low static power consumption; ICC = 0.9 µA (maximum)
  • Each port operates over the full 1.1 V to 3.6 V power supply range
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Target applications

Parametrics

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AUP1T34GSProduction1.1 - 3.61.1 - 3.6CMOS+/- 1.915.21ultra low-40~12534936.7236XSON6

Package

Type numberPackageOutline versionReflow-/Wave solderingPackingStatusMarkingOrderable part number, (Ordering code (12NC))
74AUP1T34GS
XSON6
(SOT1202)
SOT1202Reel 7" Q1/T1, Q3/T4ActivepQ74AUP1T34GS,132
( 9352 928 76132 )

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateMSLMSL leadfree
74AUP1T34GS74AUP1T34GS,13274AUP1T34GSAlways Pb-free11
Quality and reliability disclaimer

Documentation (7)

File nameTitleTypeDate
74AUP1T34Low-power dual supply translating bufferData sheet2019-01-28
AN10156Sorting through the low voltage logic mazeApplication note2013-03-13
Nexperia_document_guide_Logic_translators_201711Nexperia Logic TranslatorsBrochure2017-12-05
aup1t3474AUP1T34 IBIS modelIBIS model2014-12-14
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Leaflet2019-04-12
SOT1202_132Reversed product orientation 12NC ending 132Packing2013-04-04
SOT1202plastic, leadless extremely thin small outline package; 6 terminals; 0.35 mm pitch; 1 mm x 1mm x 0.35 mm bodyOutline drawing2018-11-14

Support

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Models

File nameTitleTypeDate
aup1t3474AUP1T34 IBIS modelIBIS model2014-12-14

Ordering, pricing & availability

Type numberOrderable part numberOrdering code (12NC)PackingBuy online
74AUP1T34GS74AUP1T34GS,132935292876132Reel 7" Q1/T1, Q3/T4Order product

Sample

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