74AUP1T97GF NRND

Low-power configurable gate with voltage-level translator

The 74AUP1T97 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter and buffer. All inputs can be connected to VCC or GND.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V.

The 74AUP1T97 is designed for logic-level translation applications with input switching levels that accept 1.8 V low-voltage CMOS signals, while operating from either a single 2.5 V or 3.3 V supply voltage.

The wide supply voltage range ensures normal operation as battery voltage drops from 3.6 V to 2.3 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Schmitt trigger inputs make the circuit tolerant to slower input rise and fall times across the entire VCC range.

Not recommended for new designs (NRND), click here for the alternative product.

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74AUP1T97GF 74AUP1T97GF,132 935281366132 SOT891 Order product

Features

  • Wide supply voltage range from 2.3 V to 3.6 V
  • High noise immunity
  • ESD protection:
    • HBM JESD22-A114F Class 3A exceeds 5000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Low static power consumption; ICC = 1.5 µA (maximum)
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Target applications

Parametrics

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AUP1T97GF
NRND
Not for design in2.3 - 3.6n.aCMOS+/- 1.98.71ultra low-40~1252906.5145XSON6

Package

Type numberPackageOutline versionReflow-/Wave solderingPackingStatusMarkingOrderable part number, (Ordering code (12NC))
74AUP1T97GF
NRND

XSON6
(SOT891)
SOT891Reel 7" Q1/T1, Q3/T4Active5974AUP1T97GF,132
( 9352 813 66132 )

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateMSLMSL leadfree
74AUP1T97GF
NRND
74AUP1T97GF,13274AUP1T97GFAlways Pb-free11
Quality and reliability disclaimer

Documentation (8)

File nameTitleTypeDate
74AUP1T97Low-power configurable gate with voltage-level translatorData sheet2017-04-14
AN10161PicoGate Logic footprintsApplication note2002-10-29
AN10156Sorting through the low voltage logic mazeApplication note2013-03-13
Nexperia_document_guide_Logic_translators_201711Nexperia Logic TranslatorsBrochure2017-12-05
aup1t97aup1t97 IBIS modelIBIS model2015-09-06
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Leaflet2019-04-12
SOT891_132XSON6; reel pack; standard product orientation; 12NC ending 132Packing2014-08-26
SOT891plastic, leadless extremely thin small outline package; 6 terminals; 0.35 mm pitch; 1 mm x 1 mm x 0.5 mm bodyOutline drawing2018-11-14

Support

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Models

File nameTitleTypeDate
aup1t97aup1t97 IBIS modelIBIS model2015-09-06

Ordering, pricing & availability

Type numberOrderable part numberOrdering code (12NC)PackingBuy online
74AUP1T97GF74AUP1T97GF,132935281366132Reel 7" Q1/T1, Q3/T4Order product

Sample

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Sample orders normally take 2-4 days for delivery.

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