74AHC74BQ-Q100

Dual D-type flip-flop with set and reset; positive-edge trigger

The 74AHC74-Q100; 74AHCT74-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.

The 74AHC74-Q100; 74AHCT74-Q100 is a dual positive-edge triggered, D-type flip-flop with individual data inputs (D), clock inputs (CP), set inputs (SD) and reset inputs (RD). It also has complementary outputs (Q and Q).

The set and reset are asynchronous active LOW inputs that operate independent of the clock input. Information on the data input is transferred to the Q output on the LOW to HIGH transition of the clock pulse. The data inputs must be stable one set-up time prior to the LOW to HIGH clock transition for predictable operation.

Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Balanced propagation delays
  • All inputs have Schmitt-trigger actions
  • Inputs accept voltages higher than VCC
  • Input levels:
    • For 74AHC74-Q100: CMOS level
    • For 74AHCT74-Q100: TTL level
  • ESD protection:
    • MIL-STD-883, method 3015 exceeds 2000 V
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
  • Multiple package options

Target applications

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AHC74BQ-Q100Production2.0 - 5.5CMOS+/- 83.7170low-40~12510620.974DHVQFN14

Package

Type numberPackageOutline versionReflow-/Wave solderingPackingStatusMarkingOrderable part number, (Ordering code (12NC))
74AHC74BQ-Q100
DHVQFN14
(SOT762-1)
SOT762-1Reel 7" Q1/T1ActiveAHC7474AHC74BQ-Q100X
( 9353 003 22115 )

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateEFRMSLMSL leadfree
74AHC74BQ-Q10074AHC74BQ-Q100X74AHC74BQ-Q100Always Pb-free84.911
Quality and reliability disclaimer

Documentation (8)

File nameTitleTypeDate
74AHC_AHCT74_Q100Dual D-type flip-flop with set and reset; positive-edge triggerData sheet2017-03-30
AN11106Pin FMEA for AHC/AHCT familyApplication note2011-11-04
AN223Ground and VCC Bounce of High-Speed Integrated CircuitsApplication note2013-03-13
AN252Live Insertion Aspects of Philips Logic FamiliesApplication note2013-03-13
AN10156Sorting through the low voltage logic mazeApplication note2013-03-13
ahc74ahc74 IBIS modelIBIS model2013-04-07
SOT762-1_115Standard product orientation 12NC ending 115Packing2013-04-09
SOT762-1plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 14 terminals; 0.5 mm pitch; 2.5 mm x 3 mm x 0.85 mm bodyOutline drawing2018-06-04

Support

Find answers to your design questions on this page. If available you can find information in our Nexperia Support Community or you can find Nexperia models and Design tools.

Models

File nameTitleTypeDate
ahc74ahc74 IBIS modelIBIS model2013-04-07

Ordering

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