74LVC1G74-Q100

Single D-type flip-flop with set and reset; positive edge trigger

The 74LVC1G74-Q100 is a single positive edge triggered D-type flip-flop. It has individual data (D) inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q outputs.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing damaging backflow current through the device when it is powered down.

The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Wide supply voltage range from 1.65 V to 5.5 V
  • 5 V tolerant inputs for interfacing with 5 V logic
  • High noise immunity
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8-B/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • MIL-STD-883, method 3015 exceeds 2000 V
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power consumption
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • Inputs accept voltages up to 5 V
  • Multiple package options

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC1G74DC-Q100Production1.65 - 5.5CMOS/LVTTL+/- 323.5280low-40~12520636.4117VSSOP8
74LVC1G74DP-Q100Production1.65 - 5.5CMOS/LVTTL+/- 323.5280low-40~12522021.3107TSSOP8
74LVC1G74GT-Q100Production3396.8166XSON8

Package

Type numberPackageOutline versionReflow-/Wave solderingPackingStatusMarkingOrderable part number, (Ordering code (12NC))
74LVC1G74DC-Q100
VSSOP8
(SOT765-1)
SOT765-1Reel 7" Q3/T4, ReverseActiveV7474LVC1G74DC-Q100H
( 9352 992 93125 )
74LVC1G74DP-Q100
TSSOP8
(SOT505-2)
SOT505-2Reel 7" Q3/T4, ReverseActiveV7474LVC1G74DP-Q100H
( 9352 992 94125 )
74LVC1G74GT-Q100
XSON8
(SOT833-1)
SOT833-1Reel 7" Q1/T1ActiveStandard Marking74LVC1G74GT-Q100X
( 9352 992 97115 )

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateEFRMSLMSL leadfree
74LVC1G74DC-Q10074LVC1G74DC-Q100H74LVC1G74DC-Q100Always Pb-free123.811
74LVC1G74DP-Q10074LVC1G74DP-Q100H74LVC1G74DP-Q100Always Pb-free123.811
74LVC1G74GT-Q10074LVC1G74GT-Q100X74LVC1G74GT-Q100Always Pb-free11
Quality and reliability disclaimer

Documentation (14)

File nameTitleTypeDate
74LVC1G74_Q100Single D-type flip-flop with set and reset; positive edge triggerData sheet2019-01-25
AN10161PicoGate Logic footprintsApplication note2002-10-29
AN11009Pin FMEA for LVC familyApplication note2019-01-09
AN10156Sorting through the low voltage logic mazeApplication note2013-03-13
75017668Low voltage CMOS family - LVCBrochure2015-07-09
lvc1g7474LVC1G74 IBIS modelIBIS model2014-10-20
nexperia_selection_guide_2019_201901Selection guide 2019. Discretes, Logic and MOSFETsSelection guide2018-12-12
SOT505-2_125TSSOP8: Reel pack, reverse; SMD, 7" Q3/T4 Standard product orientation Orderable part number ending ,125 or H Ordering code (12NC) ending 125Packing2013-05-02
SOT505-2plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm bodyOutline drawing2018-11-14
MAR_SOT833MAR_SOT833 TopmarkTop marking2013-06-03
SOT833-1_115Standard product orientation 12NC ending 115Packing2013-04-05
SOT833-1plastic, leadless extremely thin small outline package; 8 terminals; 0.5 mm pitch; 1 mm x 1.95 mm x 0.5 mm bodyOutline drawing2018-11-14
SOT765-1_125VSSOP8; Reel pack, reverse; SMD, 7" Q3/T4 Standard product orientation Orderable part number ending ,125 or H Ordering code (12NC) ending 125Packing2013-05-03
SOT765-1plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm bodyOutline drawing2018-11-14

Support

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Models

File nameTitleTypeDate
lvc1g7474LVC1G74 IBIS modelIBIS model2014-10-20

Ordering, pricing & availability

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