74LVC1G99GM

Ultra-configurable multiple function gate; 3-state

The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including, AND, OR, NAND, NOR, XOR, XNOR, inverter, buffer and MUX. No external components are required to configure the device as all inputs can be connected directly to VCC or GND. The 3-state output is controlled by the output enable input (OE). A HIGH level at OE causes the output (Y) to assume a high-impedance OFF-state. When OE is LOW, the output state is determined by the signals applied to the Schmitt-trigger inputs (A, B, C and D).

Due to the use of Schmitt-trigger inputs the device is tolerant of slowly changing input signals, transforming them into sharply defined, jitter free output signals. By eliminating leakage current paths to VCC and GND, the inputs and disabled output are also over-voltage tolerant, making the device suitable for mixed-voltage applications.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

The 74LVC1G99 is fully specified over the supply range from 1.65 V to 5.5 V.

Features

  • Wide supply voltage range from 1.65 V to 5.5 V
  • 5 V tolerant inputs for interfacing with 5 V logic
  • High noise immunity
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8-B/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power consumption
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • Inputs accept voltages up to 5 V
  • Multiple package options
  • Specified from –40 ℃ to +85 ℃ and –40 ℃ to +125 ℃.

Target applications

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC1G99GMProduction1.65 - 5.5TTL+/- 328.41501low-40~12525317.4140XQFN8

Package

Type numberPackageOutline versionReflow-/Wave solderingPackingStatusMarkingOrderable part number, (Ordering code (12NC))
74LVC1G99GM
XQFN8
(SOT902-2)
SOT902-2Reel 7" Q3/T4, ReverseActiveV9974LVC1G99GM,125
( 9352 844 38125 )

Quality

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateEFRIFRMTBF (hour)MSLMSL leadfree
74LVC1G99GM74LVC1G99GM,12574LVC1G99GMAlways Pb-free123.83.872.58E811
Quality and reliability disclaimer

Documentation (9)

File nameTitleTypeDate
74LVC1G99Ultra-configurable multiple function gate; 3-stateData sheet2017-03-17
AN10161PicoGate Logic footprintsApplication note2002-10-29
AN10343MicroPak soldering informationApplication note2010-12-30
AN11009Pin FMEA for LVC familyApplication note2011-02-04
AN212Package lead inductance considerations in high-speed applicationsApplication note2013-03-13
AN10156Sorting through the low voltage logic mazeApplication note2013-03-13
lvc1g9974LVC1G99 IBIS modelIBIS model2014-10-20
SOT902-2_125XQFN8(U); Reel pack, reverse; SMD, 7" Q3/T4 Standard product orientation Orderable part number ending ,125 or H Ordering code (12NC) ending 125Packing2013-05-02
SOT902-2plastic, extremely thin quad flat package; 8 terminals; 0.55 mm pitch; 1.6 mm x 1.6 mm x 0.5 mm bodyOutline drawing2017-01-30

Support

Find answers to your design questions on this page. If available you can find information in our Nexperia Support Community or you can find Nexperia models and Design tools.

Models

File nameTitleTypeDate
lvc1g9974LVC1G99 IBIS modelIBIS model2014-10-20

Ordering

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