74LVC2G08GT

Dual 2-input AND gate

The 74LVC2G08 provides a 2-input AND gate function.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC2G08 as a translator in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

Features

  • Wide supply voltage range from 1.65 V to 5.5 V
  • 5 V tolerant outputs for interfacing with 5 V logic
  • High noise immunity
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power consumption
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8-B/JESD36 (2.7 V to 3.6 V)
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • Inputs accept voltages up to 5 V
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
  • Multiple package options
  • Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃

Target applications

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC2G08GTProduction1.65 - 5.5CMOS / LVTTL+/- 242.11502low-40~1253175.6150XSON8

Package

Type numberPackageOutline versionReflow-/Wave solderingPackingStatusMarkingOrderable part number, (Ordering code (12NC))
74LVC2G08GT
XSON8
(SOT833-1)
SOT833-1Reel 7" Q1/T1ActiveV0874LVC2G08GT,115
( 9352 789 21115 )

Quality

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateEFRIFRMTBF (hour)MSLMSL leadfree
74LVC2G08GT74LVC2G08GT,11574LVC2G08GTAlways Pb-free123.83.872.58E811
Quality and reliability disclaimer

Documentation (8)

File nameTitleTypeDate
74LVC2G08Dual 2-input AND gateData sheet2017-03-17
AN10161PicoGate Logic footprintsApplication note2002-10-29
AN10343MicroPak soldering informationApplication note2010-12-30
AN11009Pin FMEA for LVC familyApplication note2011-02-04
AN212Package lead inductance considerations in high-speed applicationsApplication note2013-03-13
AN10156Sorting through the low voltage logic mazeApplication note2013-03-13
lvc2g0874LVC2G08 IBIS modelIBIS model2014-10-20
SOT833-1plastic, extremely thin small outline package; 8 terminals; 0.6 mm pitch; 1 mm x 1.95 mm x 0.5 mm bodyOutline drawing2017-01-30

Support

Find answers to your design questions on this page. If available you can find information in our Nexperia Support Community or you can find Nexperia models and Design tools.

Models

File nameTitleTypeDate
lvc2g0874LVC2G08 IBIS modelIBIS model2014-10-20

Ordering

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