74LVC573ABQ

Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

The 74LVC573A consists of eight D-type transparent latches, featuring separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A Latch Enable (LE) input and an Output Enable (OE) input are common to all internal latches.

When LE is HIGH, data at the Dn inputs enters the latches. In this condition, the latches are transparent, that is, a latch output will change each time its corresponding D-input changes. When LE is LOW, the latches store the information that was present at the D-inputs one set-up time preceding the HIGH-to-LOW transition of LE.

When OE is LOW, the contents of the eight latches are available at the outputs. When OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the latches.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V or 5 V applications.

The 74LVC573A is functionally identical to the 74LVC373A, but has a different pin arrangement.

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74LVC573ABQ 74LVC573ABQ,115 935273507115 SOT764-1 Order product

Features

  • 5 V tolerant inputs/outputs, for interfacing with 5 V logic
  • Supply voltage range from 1.2 to 3.6 V
  • CMOS low power consumption
  • Direct interface with TTL levels
  • High impedance when VCC = 0 V
  • Flow-through pin-out architecture
  • Complies with JEDEC standard:
    • JESD8-7A (1.65 V to 1.95 V)
    • JESD8-5A (2.3 V to 2.7 V)
    • JESD8-C/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • HBMJESD22-A114F exceeds 2000 V
    • MM JESD22-A115-B exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Target applications

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC573ABQProduction1.2 - 3.6TTL+/- 243.48low-40~125799.550DHVQFN20

Package

Type numberOrderable part number, (Ordering code (12NC))StatusMarkingPackageOutline versionReflow-/Wave solderingPacking
74LVC573ABQ74LVC573ABQ,115
( 9352 735 07115 )
ActiveLVC573A
DHVQFN20
(SOT764-1)
SOT764-1Reel 7" Q1/T1

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateEFRIFRMTBF (hour)MSLMSL leadfree
74LVC573ABQ74LVC573ABQ,11574LVC573ABQAlways Pb-free123.83.872.58E811
Quality and reliability disclaimer

Documentation (6)

File nameTitleTypeDate
74LVC573AOctal D-type transparent latch with 5 V tolerant inputs/outputs; 3-stateData sheet2018-09-26
AN11009Pin FMEA for LVC familyApplication note2019-01-09
lvc573alvc573a IBIS modelIBIS model2013-04-07
lvclvc Spice modelSPICE model2013-05-06
SOT764-1_115DHVQFN20; Reel pack; SMD, 7" Q1/T1 Standard product orientation Orderable part number ending ,115 or X Ordering code (12NC) ending 115Packing2013-04-23
SOT764-1plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 20 terminals; 0.5 mm pitch; 4.5 mm x 2.5 mm x 1 mm bodyOutline drawing2018-11-14

Support

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Models

File nameTitleTypeDate
lvc573alvc573a IBIS modelIBIS model2013-04-07
lvclvc Spice modelSPICE model2013-05-06

Ordering, pricing & availability

Type numberOrderable part numberOrdering code (12NC)PackingBuy online
74LVC573ABQ74LVC573ABQ,115935273507115Reel 7" Q1/T1Order product

Sample

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