74LVC163

Presettable synchronous 4-bit binary counter; synchronous reset

The 74LVC163 is a synchronous presettable binary counter which features an internal look-ahead carry and can be used for high-speed counting. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (pin CP). The outputs (pins Q0 to Q3) of the counters may be preset to a HIGH-level or LOW-level. A LOW-level at the parallel enable input (pin PE) disables the counting action and causes the data at the data inputs (pins D0 to D3) to be loaded into the counter on the positive-going edge of the clock (provided that the set-up and hold time requirements for PE are met). Preset takes place regardless of the levels at count enable inputs (pin CEP and CET). A LOW-level at the master reset input (pin MR) sets all four outputs of the flip-flops (pins Q0 to Q3) to LOW-level after the next positive-going transition on the clock input (pin CP) (provided that the set-up and hold time requirements for PE are met). This action occurs regardless of the levels at input pins PE, CET and CEP. This synchronous reset feature enables the designer to modify the maximum count with only one external NAND gate.

The look-ahead carry simplifies serial cascading of the counters. Both count enable inputs (pin CEP and CET) must be HIGH in count. The CET input is fed forward to enable the terminal count output (pin TC). The TC output thus enabled will produce a HIGH output pulse of a duration approximately equal to a HIGH-level output of Q0. This pulse can be used to enable the next cascaded stage.

The maximum clock frequency for the cascaded counters is determined by tPHL (propagation delay CP to TC) and tsu (set-up time CEP to CP) according to the formula: fmax=1/(tPHL(max)+tsu)

Features and benefits

  • Wide supply voltage range from 1.2 V to 3.6 V
  • Inputs accept voltages up to 5.5 V
  • CMOS low power consumption
  • Direct interface with TTL levels
  • Synchronous reset
  • Synchronous counting and loading
  • Two count enable inputs for n-bit cascading
  • Positive edge-triggered clock
  • Complies with JEDEC standard:
    • JESD8-7A (1.65 V to 1.95 V)
    • JESD8-5A (2.3 V to 2.7 V)
    • JESD8-C/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-B exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Parametrics

Type numberProduct statusVCC (V)Output drive capability (mA)Logic switching levelstpd (ns)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC163BQProduction1.2 - 3.6± 24CMOS/LVTTL4.9low-40~1259313.862DHVQFN16
74LVC163DProduction1.2 - 3.6± 24CMOS/LVTTL4.9low-40~125929.651.7SO16
74LVC163PWProduction1.2 - 3.6± 24CMOS/LVTTL4.9low-40~1251254.654.7TSSOP16

Package

Type numberPackagePackage informationReflow-/Wave solderingPackingStatusMarkingOrderable part number, (Ordering code (12NC))
74LVC163BQ
DHVQFN16
(SOT763-1)
SOT763-1Reel 7” Q1/T1 or Q2/T3ActiveLVC16374LVC163BQ,115
( 9352 756 15115 )
74LVC163D
SO16
(SOT109-1)
SOT109-1SO-SOJ-REFLOW
SO-SOJ-WAVE
Reel 13" Q1/T1Active74LVC163D74LVC163D,118
( 9352 105 40118 )
Bulk PackActive74LVC163D74LVC163D,112
( 9352 105 40112 )
74LVC163PW
TSSOP16
(SOT403-1)
SOT403-1SSOP-TSSOP-VSO-WAVE
Reel 13" Q1/T1ActiveLVC16374LVC163PW,118
( 9352 105 60118 )
Bulk PackActiveLVC16374LVC163PW,112
( 9352 105 60112 )

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateEFRIFRMTBF (hour)MSLMSL leadfree
74LVC163BQ74LVC163BQ,11574LVC163BQAlways Pb-free123.83.872.58E811
74LVC163D74LVC163D,11874LVC163DAlways Pb-free123.83.872.58E811
74LVC163D74LVC163D,11274LVC163DAlways Pb-free123.83.872.58E811
74LVC163PW74LVC163PW,11874LVC163PWweek 10, 2005123.83.872.58E811
74LVC163PW74LVC163PW,11274LVC163PWweek 10, 2005123.83.872.58E811
Quality and reliability disclaimer

Documentation (11)

File nameTitleTypeDate
74LVC163Presettable synchronous 4-bit binary counter; synchronous resetData sheet2017-05-03
AN11009Pin FMEA for LVC familyApplication note2019-01-09
lvc163lvc163 IBIS modelIBIS model2013-04-07
Nexperia_Selection_guide_2020Nexperia Selection Guide 2020Selection guide2020-01-31
lvclvc Spice modelSPICE model2013-05-06
SOT763-1plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 16 terminals; 0.5 mm pitch; 3.5 mm x 2.5 mm x 1 mm bodyPackage information2020-04-21
SO-SOJ-REFLOWFootprint for reflow solderingReflow soldering2009-10-08
SO-SOJ-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT109-1plastic, small outline package; 16 leads; 1.27 mm pitch; 9.9 mm x 3.9 mm x 1.35 mm bodyPackage information2020-04-21
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT403-1plastic, thin shrink small outline package; 16 leads; 5 mm x 4.4 mm x 1.1 mm bodyPackage information2020-04-21

Support

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Models

File nameTitleTypeDate
lvc163lvc163 IBIS modelIBIS model2013-04-07
lvclvc Spice modelSPICE model2013-05-06

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