74LVC2G67-Q100
Bilateral switch
The 74LVC2G67-Q100 is a dual single pole, single-throw analog switch. Each switch has two input/output terminals (nY and nZ) and a digital enable input (nE). When nE is HIGH, the analog switch is turned off. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 1.65 V to 5.5 V
Very low ON resistance:
7.5 Ω (typical) at VCC = 2.7 V
6.5 Ω (typical) at VCC = 3.3 V
6 Ω (typical) at VCC = 5 V
Switch current capability of 32 mA
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low power consumption
TTL interface compatibility at 3.3 V
Latch-up performance meets requirements of JESD78 Class I
Complies with JEDEC standards:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Parametrics
| Type number | Configuration | VCC (V) | RON (Ω) | RON(FLAT) (Ω) | Logic switching levels | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC2G67DC-Q100 | SPST-NO | 1.65 - 5.5 | 15 | 1.5 | CMOS/LVTTL | very low | -40~125 | 196 | 15.1 | 99 | VSSOP8 |
| 74LVC2G67DP-Q100 | SPST-NO | 1.65 - 5.5 | 15 | 1.5 | CMOS/LVTTL | very low | -40~125 | 192 | 26.5 | 101 | TSSOP8 |
| 74LVC2G67GT-Q100 | XSON8 |
Package
| Type number | Orderable part number, (Ordering code (12NC)) | Status | Marking | Package | Package information | Reflow-/Wave soldering | Packing |
|---|---|---|---|---|---|---|---|
| 74LVC2G67DC-Q100 | 74LVC2G67DC-Q100H (935692626125) |
Active | V67 |
VSSOP8 (SOT765-1) |
SOT765-1 | SOT765-1_125 | |
| 74LVC2G67DP-Q100 | 74LVC2G67DP-Q100H (935692628125) |
Active | V67 |
TSSOP8 (SOT505-2) |
SOT505-2 | SOT505-2_125 | |
| 74LVC2G67GT-Q100 | 74LVC2G67GT-Q100X (935692630115) |
Development | V67 |
XSON8 (SOT833-1) |
SOT833-1 | SOT833-1_115 |
Environmental information
| Type number | Orderable part number | Chemical content | RoHS | RHF-indicator |
|---|---|---|---|---|
| 74LVC2G67DC-Q100 | 74LVC2G67DC-Q100H | 74LVC2G67DC-Q100 |
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| 74LVC2G67DP-Q100 | 74LVC2G67DP-Q100H | 74LVC2G67DP-Q100 |
|
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| 74LVC2G67GT-Q100 | 74LVC2G67GT-Q100X | 74LVC2G67GT-Q100 |
|
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Documentation (13)
| File name | Title | Type | Date |
|---|---|---|---|
| 74LVC2G67_Q100 | Bilateral switch | Data sheet | 2025-09-25 |
| AN90063 | Questions about package outline drawings | Application note | 2025-09-15 |
| Nexperia_document_guide_MiniLogic_PicoGate_201901 | PicoGate leaded logic portfolio guide | Brochure | 2019-01-07 |
| Nexperia_document_guide_MiniLogic_MicroPak_201808 | MicroPak leadless logic portfolio guide | Brochure | 2018-09-03 |
| SOT765-1 | 3D model for products with SOT765-1 package | Design support | 2020-01-22 |
| SOT505-2 | 3D model for products with SOT505-2 package | Design support | 2019-01-18 |
| SOT833-1 | 3D model for products with SOT833-1 package | Design support | 2021-01-28 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| VSSOP8_SOT765-1_mk | plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm body | Marcom graphics | 2017-01-28 |
| SOT765-1 | plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm body | Package information | 2022-06-03 |
| SOT505-2 | plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm body | Package information | 2022-06-03 |
| SOT833-1 | plastic, leadless extremely thin small outline package; 8 terminals; 0.5 mm pitch; 1 mm x 1.95 mm x 0.5 mm body | Package information | 2022-06-03 |
| MAR_SOT833 | MAR_SOT833 Topmark | Top marking | 2013-06-03 |
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