Features and benefits
- 16-bit bus interface
- 3-state buffers
- Output capability: +64 mA and -32 mA
- TTL input and output switching levels
- Input and output interface capability to systems at 5 V supply
- Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
- Live insertion and extraction permitted
- Power-up reset
- Power-up 3-state
- No bus current loading when output is tied to 5 V bus
- Latch-up protection exceeds 500 mA per JESD78
- ESD protection:
- MIL STD 883 method 3015: exceeds 2000 V
- Machine model: exceeds 200 V
Documentation (4)
File name | Title | Type | Date |
---|---|---|---|
74LVT16652A | 3.3 V 16-bit bus transceiver/register; 3-state | Data sheet | 2005-01-11 |
lvt16652a | lvt16652a IBIS model | IBIS model | 2013-04-07 |
Nexperia_Selection_guide_2023 | Nexperia Selection Guide 2023 | Selection guide | 2023-05-10 |
lvt16 | lvt16 Spice model | SPICE model | 2013-05-06 |
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