74ALVCH162601

18-bit universal bus transceiver with 30 Ω termination resistor; 3-state

The 74ALVCH162601 is an 18-bit universal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA) and clock (CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CPAB is held at a HIGH or LOW logic level. If LEAB is LOW, the A-bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CPAB. When OEAB is LOW, the outputs are active. When OEAB is HIGH, the outputs are in the high-impedance state. The clocks can be controlled with the clock-enable inputs (CEBA and CEAB).

Data flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA.

To ensure the high impedance state during power up or power down, OEBA and OEAB should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.

The 74ALVCH162601 is designed with 30 Ω series resistors in both HIGH or LOW output stage.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

Features

  • CMOS low power consumption
  • MultiByte flow-through standard pin-out architecture
  • Low inductance multiple VCC and GND pins for minimum noise and ground bounce
  • Direct interface with TTL levels
  • Bus hold on data inputs
  • Integrated 30 Ω termination resistors.
  • Complies with JEDEC standards:
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8B/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • HBM ANSI/ESDA/JEDEC JS-001 exceeds 2000 V
    • CDM JESD22-C101E exceeds 1000 V

Parametrics

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capabilitytpd (ns)No of bitsfmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Package name
74ALVCH162601DGGProduction1.65 - 3.6n.a.TTL+/- 123.118150low-40~859321.0TSSOP56

Package

Type numberPackageOutline versionReflow-/Wave solderingPackingStatusMarkingOrderable part number, (Ordering code (12NC))
74ALVCH162601DGG
TSSOP56
(SOT364-1)
SOT364-1SSOP-TSSOP-VSO-WAVE
Tube in DrypackActiveALVCH16260174ALVCH162601DGGS
( 9352 628 00512 )
Reel 13" Q1/T1 in DrypackActiveALVCH16260174ALVCH162601DGGY
( 9352 628 00518 )

Discontinuation information

Type numberOrderable part number, (Ordering code (12NC))Last time buy dateLast time delivery dateReplacement productStatusComments
74ALVCH162601DGG935262800112
74ALVCH162601DGG935262800118

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateEFRIFRMTBF (hour)MSLMSL leadfree
74ALVCH162601DGG74ALVCH162601DGGS74ALVCH162601DGGAlways Pb-free123.83.872.58E822
74ALVCH162601DGG74ALVCH162601DGGY74ALVCH162601DGGAlways Pb-free123.83.872.58E822
Quality and reliability disclaimer

Documentation (5)

File nameTitleTypeDate
74ALVCH16260118-bit universal bus transceiver with 30 ohm termination resistor; 3-stateData sheet2018-08-14
alvch162601alvch162601 IBIS modelIBIS model2013-04-07
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT364-1_118TSSOP56; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering code (12NC) ending 118Packing2013-04-15
SOT364-1plastic, thin shrink small outline package; 56 leads; 0.5 mm pitch; 14 mm x 6.1 mm x 1.2 mm bodyOutline drawing2018-10-18

Support

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Models

File nameTitleTypeDate
alvch162601alvch162601 IBIS modelIBIS model2013-04-07

Ordering, pricing & availability

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