74AUP1G17GN
|
Low-power Schmitt trigger |
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74AUP1G79GN
|
Low-power D-type flip-flop; positive-edge trigger |
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74AUP1G240GN
|
Low-power inverting buffer/line driver; 3-state |
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74AUP1G374GN
|
Low-power D-type flip-flop; positive-edge trigger; 3-state |
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74AUP1G125GN
|
Low-power buffer/line driver; 3-state |
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74AUP1G126GN
|
Low-power buffer/line driver; 3-state |
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74AUP1G386GN
|
Low-power 3-input EXCLUSIVE-OR gate |
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74AUP1G19GN
|
Low-power 1-of-2 decoder/demultiplexer |
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74AUP1G07GN
|
Low-power buffer with open-drain output |
|
74AUP1G97GN
|
Low-power configurable multiple function gate |
|
74AVC1T45GN
|
Dual-supply voltage level translator/transceiver; 3-state |
|
74AUP1G38GN
|
Low-power 2-input NAND gate (open drain) |
|
74AUP1G57GN
|
Low-power configurable multiple function gate |
|
74AUP1G02GN
|
Low-power 2-input NOR gate |
|
74AUP1T34GN
|
Low-power dual supply translating buffer |
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74AUP2G17GN
|
Low-power dual Schmitt trigger |
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74AUP1G132GN
|
Low-power 2-input NAND Schmitt trigger |
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74AVCH1T45GN
|
Dual-supply voltage level translator/transceiver; 3-state |
|
74AUP1G11GN
|
Low-power 3-input AND gate |
|
74AUP2G14GN
|
Low-power dual Schmitt trigger inverter |
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74AUP1G80GN
|
Low-power D-type flip-flop; positive-edge trigger |
|
74AUP2G3404GN
|
Low-power buffer and inverter |
|
74AUP1G158GN
|
Low-power 2-input multiplexer; inverting |
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74AUP1G08GN
|
Low-power 2-input AND gate |
|
74LVC1G32GN
|
Single 2-input OR gate |
|
74AUP1T45GN
|
Low-power dual supply translating transceiver; 3-state |
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74AUP1T98GN
|
Low-power configurable gate with voltage-level translator |
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74AUP2G07GN
|
Low-power dual buffer with open-drain output |
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74LVC1G125GN
|
Bus buffer/line driver; 3-state |
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74AUP1G175GN
|
Low-power D-type flip-flop with reset; positive-edge trigger |
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74AUP1G34GN
|
Low-power buffer |
|
74AUP1G00GN
|
Low-power 2-input NAND gate |
|
74AUP1G98GN
|
Low-power configurable multiple function gate |
|
74AUP1Z125GN
|
Low-power X-tal driver with enable and internal resistor; 3-state |
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74AUP1T58GN
|
Low-power configurable gate with voltage-level translator |
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74AUP1G157GN
|
Low-power 2-input multiplexer |
|
74LVC1G384GN
|
Bilateral switch |
|
74LVC1G332GN
|
Single 3-input OR gate |
|
74AUP1G3208GN
|
Low-power 3-input OR-AND gate |
|
74AUP1G0832GN
|
Low-power 3-input AND-OR gate |
|
74AUP1G58GN
|
Low-power configurable multiple function gate |
|
74AUP1G373GN
|
Low-power D-type transparent latch; 3-state |
|
74LVCH1T45GN
|
Dual supply translating transceiver; 3-state |
|
74AUP1G06GN
|
Low-power inverter with open-drain output |
|
74AUP1G32GN
|
Low-power 2-input OR-gate |
|
74LVC2G04GN
|
Dual inverter |
|
74AUP2G0604GN
|
Low-power inverting buffer with open-drain and inverter |
|
74LVC1G04GN
|
Single inverter |
|
74LVC2G17GN
|
Dual non-inverting Schmitt trigger with 5 V tolerant input |
|
74LVC1G80GN
|
Single D-type flip-flop; positive-edge trigger |
|
74LVC1G79GN
|
Single D-type flip-flop; positive-edge trigger |
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74AUP1G09GN
|
Low-power 2-input AND gate with open-drain |
|
74LVC1G126GN
|
Bus buffer/line driver; 3-state |
|
74LVC1G10GN
|
Single 3-input NAND gate |
|
74LVC1G11GN
|
Single 3-input AND gate |
|
74LVC2G34GN
|
Dual buffer gate |
|
74LVC1G34GN
|
Single buffer |
|
74LVC1G08GN
|
Single 2-input AND gate |
|
74LVC1G17GN
|
Single Schmitt trigger buffer |
|
74AUP1Z04GN
|
Low-power X-tal driver with enable and internal resistor |
|
74AUP1GU04GN
|
Low-power unbuffered inverter |
|
74LVC1GU04GN
|
Unbuffered inverter |
|
74LVC1G02GN
|
Single 2-input NOR gate |
|
74LVC2G06GN
|
Inverters with open-drain outputs |
|
74LVC1G06GN
|
Inverter with open-drain output |
|
74LVC1T45GN
|
Dual supply translating transceiver; 3-state |
|
74LVC1G27GN
|
Single 3-input NOR gate |
|
74AUP1G14GN
|
Low-power Schmitt trigger inverter |
|
74LVC1G19GN
|
1-of-2 decoder/demultiplexer |
|
74LVC1G86GN
|
2-input EXCLUSIVE-OR gate |
|
74AUP1G332GN
|
Low-power 3-input OR-gate |
|
74AUP1G18GN
|
Low-power 1-of-2 demultiplexer with 3-state deselected output |
|
74AUP2G34GN
|
Low-power dual buffer |
|
74LVC1G58GN
|
Low-power configurable multiple function gate |
|
74AUP1G86GN
|
Low-power 2-input EXCLUSIVE-OR gate |
|
74LVC1G38GN
|
2-input NAND gate; open drain |
|
74LVC1G3157GN
|
10 Ω single-pole double-throw analog switch |
|
74AUP1G04GN
|
Low-power inverter |
|
74LVC1G66GN
|
Bilateral switch |
|
74LVC2G07GN
|
Buffers with open-drain outputs |
|
74LVC1G57GN
|
Low-power configurable multiple function gate |
|
74AUP2GU04GN
|
Low-power dual unbuffered inverter |
|
74AUP2G06GN
|
Low-power dual inverter with open-drain output |
|
74LVC1G14GN
|
Single Schmitt-trigger inverter |
|
74AUP1T57GN
|
Low-power configurable gate with voltage-level translator |
|
74AUP2G04GN
|
Low-power dual inverter |
|
74CBTLV1G125GN
|
Single bus switch |
|
74LVC2G14GN
|
Dual inverting Schmitt trigger with 5 V tolerant input |
|
74LVC2GU04GN
|
Dual unbuffered inverter |
|
74LVC1G157GN
|
Single 2-input multiplexer |
|
74LVC1G00GN
|
Single 2-input NAND gate |
|
74LVC1G98GN
|
Low-power configurable multiple function gate |
|
74LVC1G175GN
|
Single D-type flip-flop with reset; positive-edge trigger |
|
74LVC1G97GN
|
Low-power configurable multiple function gate |
|
74LVC1G07GN
|
Buffer with open-drain output |
|
74AUP1T97GN
|
Low-power configurable gate with voltage-level translator |
|
74AUP2G3407GN
|
Low-power single buffer; single buffer with open-drain |
|