74AVC2T45

Dual-bit, dual-supply voltage level translator/transceiver; 3-state

The 74AVC2T45 is a dual-bit, dual-supply transceiver that enables bidirectional level translation. It features two data input-output ports (nA and nB), a direction control input (DIR) and dual-supply pins (V_CC(A) and V_CC(B)). Both V_CC(A) and V_CC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nA and DIR are referenced to V_CC(A) and pins nB are referenced to V_CC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA.

The device is fully specified for partial power-down applications using I_OFF. The I_OFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In Suspend mode when either V_CC(A) or V_CC(B) are at GND level, both A and B are in the high-impedance OFF-state.

Features and benefits

Wide supply voltage range:
- V_CC(A): 0.8 V to 3.6 V
- V_CC(B): 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
- JESD8-12 (0.8 V to 1.3 V)
- JESD8-11 (0.9 V to 1.65 V)
- JESD8-7 (1.2 V to 1.95 V)
- JESD8-5 (1.8 V to 2.7 V)
- JESD8-B (2.7 V to 3.6 V)
ESD protection:
- HBM JESD22-A114F Class 3B exceeds 8000 V
- MM JESD22-A115-A exceeds 200 V
- CDM JESD22-C101C exceeds 1000 V
Maximum data rates:
- 500 Mbit/s (1.8 V to 3.3 V translation)
- 320 Mbit/s (<1.8 V to 3.3 V translation)
- 320 Mbit/s (translate to 2.5 V or 1.8 V)
- 280 Mbit/s (translate to 1.5 V)
- 240 Mbit/s (translate to 1.2 V)
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V_CC
I_OFF circuitry provides partial Power-down mode operation
Multiple package options
Specified from –40 ℃ to +85 ℃ and –40 ℃ to +125 ℃

Parametrics

Type number	Product status	V_CC(A) (V)	V_CC(B) (V)	Logic switching levels	Output drive capability (mA)	t_pd (ns)	No of bits	Power dissipation considerations	T_amb (°C)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name
74AVC2T45DC	Production	0.8 - 3.6	0.8 - 3.6	CMOS/LVTTL	± 12	2.1	2	very low	-40~125	205	35.3	115	VSSOP8
74AVC2T45DP	Production	0.8 - 3.6	0.8 - 3.6	CMOS/LVTTL	± 12	2.1	2	very low	-40~125	217	20.6	106	TSSOP8
74AVC2T45GF NRND	Not for design in	-	-	-	-	-	-	-	-	-	-	-	XSON8
74AVC2T45GN	Production	0.8 - 3.6	0.8 - 3.6	CMOS/LVTTL	± 12	2.1	2	very low	-40~125	242	11.4	151	XSON8
74AVC2T45GS	Production	0.8 - 3.6	0.8 - 3.6	CMOS/LVTTL	± 12	2.1	2	very low	-40~125	280	11.5	149	XSON8
74AVC2T45GT	Production	0.8 - 3.6	0.8 - 3.6	CMOS/LVTTL	± 12	2.1	2	very low	-40~125	333	6.5	161	XSON8

Package

Type number	Package	Package information	Packing	Status	Marking	Orderable part number, (Ordering code (12NC))
74AVC2T45DC	VSSOP8 (SOT765-1)	SOT765-1	Reel 7" Q3/T4, Reverse	Active	B45	74AVC2T45DC,125 ( 9352 837 16125 )
74AVC2T45DP	TSSOP8 (SOT505-2)	SOT505-2	Reel 7" Q3/T4, Reverse	Active	B45	74AVC2T45DP,125 ( 9352 867 74125 )
74AVC2T45GF NRND	XSON8 (SOT1089)	SOT1089	Reel 7” Q1/T1 or Q2/T3	Active	B5	74AVC2T45GF,115 ( 9352 914 97115 )
74AVC2T45GN	XSON8 (SOT1116)	SOT1116	Reel 7” Q1/T1 or Q2/T3	Active	B5	74AVC2T45GN,115 ( 9352 922 32115 )
74AVC2T45GS	XSON8 (SOT1203)	SOT1203	Reel 7” Q1/T1 or Q2/T3	Active	B5	74AVC2T45GS,115 ( 9352 927 93115 )
74AVC2T45GT	XSON8 (SOT833-1)	SOT833-1	Reel 7” Q1/T1 or Q2/T3	Active	B45	74AVC2T45GT,115 ( 9352 837 15115 )

Quality, reliability & chemical content

Type number	Orderable part number	Chemical content	Leadfree conversion date	EFR	IFR	MTBF (hour)	MSL	MSL leadfree
74AVC2T45DC	74AVC2T45DC,125	74AVC2T45DC	Always Pb-free	44.0	1.7	6.83E4	1	1
74AVC2T45DP	74AVC2T45DP,125	74AVC2T45DP	Always Pb-free	44.0	1.7	6.83E4	1	1
74AVC2T45GF NRND	74AVC2T45GF,115	74AVC2T45GF	Always Pb-free				1	1
74AVC2T45GN	74AVC2T45GN,115	74AVC2T45GN	Always Pb-free	44.0	1.7	6.83E4	1	1
74AVC2T45GS	74AVC2T45GS,115	74AVC2T45GS	Always Pb-free	44.0	1.7	6.83E4	1	1
74AVC2T45GT	74AVC2T45GT,115	74AVC2T45GT	Always Pb-free	44.0	1.7	6.83E4	1	1

Quality and reliability disclaimer

Documentation (15)

File name	Title	Type	Date
74AVC2T45	Dual-bit, dual-supply voltage level translator/transceiver; 3-state	Data sheet	2018-09-25
AN10161	PicoGate Logic footprints	Application note	2002-10-29
avc2t45	74AVC2T45 IBIS model	IBIS model	2020-03-23
Nexperia_Selection_guide_2020	Nexperia Selection Guide 2020	Selection guide	2020-01-31
Nexperia_Selection_guide_2021	Nexperia Selection Guide 2021	Selection guide	2021-01-08
SOT505-2	plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm body	Package information	2020-04-21
SOT1089	plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.5 mm body	Package information	2020-04-21
MAR_SOT1089	MAR_SOT1089 Topmark	Top marking	2013-06-03
SOT1203	plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body	Package information	2020-04-21
MAR_SOT1203	MAR_SOT1203 Topmark	Top marking	2013-06-03
SOT833-1	plastic, leadless extremely thin small outline package; 8 terminals; 0.5 mm pitch; 1 mm x 1.95 mm x 0.5 mm body	Package information	2020-04-21
MAR_SOT833	MAR_SOT833 Topmark	Top marking	2013-06-03
SOT765-1	plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm body	Package information	2020-04-21
SOT1116	plastic, leadless extremely thin small outline package; 8 terminals; 0.3 mm pitch; 1.2 mm x 1 mm x 0.35 mm body	Package information	2020-04-21
MAR_SOT1116	MAR_SOT1116 Topmark	Top marking	2013-06-03

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Models

File name	Title	Type	Date
avc2t45	74AVC2T45 IBIS model	IBIS model	2020-03-23

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