Package information
| Package information | Package name | Package description | Reference | Date |
|---|---|---|---|---|
| SOT1116 | XSON8 | plastic, leadless extremely thin small outline package; 8 terminals; 0.3 mm pitch; 1.2 mm x 1 mm x 0.35 mm body | 2010-04-07 |
Boards
| Part number | Description | Type | Quick links | Shop link |
|---|---|---|---|---|
|
Description NEVB-LOGIC02 is a dual in-line logic footprint adapter board, designed to simplify the evaluation of Nexperia logic devices by offering several package footprints.
|
Type Evaluation board
|
Quick links
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Shop link
|
Related documents
| File name | Title | Type | Date |
|---|---|---|---|
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| Nexperia_document_guide_MiniLogic_MicroPak_201808 | MicroPak leadless logic portfolio guide | Brochure | 2018-09-03 |
| SOT1116 | 3D model for products with SOT1116 package | Design support | 2023-02-02 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SOT1116 | plastic, leadless extremely thin small outline package; 8 terminals; 0.3 mm pitch; 1.2 mm x 1 mm x 0.35 mm body | Package information | 2022-06-02 |
| SOT1116_115 | XSON8 ; Reel pack for SMD, 7''; Q1/T1 product orientation | Packing information | 2020-04-21 |
| REFLOW_BG-BD-1 | Reflow soldering profile | Reflow soldering | 2021-04-06 |
| MAR_SOT1116 | MAR_SOT1116 Topmark | Top marking | 2013-06-03 |
Products in this package
Analog & Logic ICs
| Type number | Description | Quick access |
|---|---|---|
| 74AUP1G885GN | Low-power dual function gate | |
| 74AUP2G00GN | Low-power dual 2-input NAND gate | |
| 74AUP2G02GN | Low-power dual 2-input NOR gate | |
| 74AUP2G08GN | Low-power dual 2-input AND gate | |
| 74AUP2G125GN | Low-power dual buffer/line driver; 3-state | |
| 74AUP2G126GN | Low-power dual buffer/line driver; 3-state | |
| 74AUP2G132GN | Low-power dual 2-input NAND Schmitt trigger | |
| 74AUP2G157GN | Low-power 2-input multiplexer | |
| 74AUP2G240GN | Low-power dual inverting buffer/line driver; 3-state | |
| 74AUP2G241GN | Low-power dual buffer/line driver; 3-state | |
| 74AUP2G32GN | Low-power dual 2-input OR gate | |
| 74AUP2G38GN | Low-power dual 2-input NAND gate; open drain | |
| 74AUP2G79GN | Low-power dual D-type flip-flop; positive-edge trigger | |
| 74AUP2G80GN | Low-power dual D-type flip-flop; positive-edge trigger | |
| 74AUP2G86GN | Low-power dual 2-input EXCLUSIVE-OR gate | |
| 74AUP3G07GN | Low-power triple buffer with open-drain output | |
| 74AUP3G17GN | Low-power triple Schmitt trigger | |
| 74AUP3G34GN | Low-power triple buffer | |
| 74AUP3G0434GN | Low-power dual inverter and single buffer | |
| 74AUP3G04GN | Low-power triple inverter | |
| 74AUP3G14GN | Low-power triple Schmitt trigger inverter | |
| 74AUP3G3404GN | Low-power dual buffer and single inverter | |
| 74AVC2T45GN | Dual-bit, dual-supply voltage level translator/transceiver; 3-state | |
| 74LVC1G74GN | Single D-type flip-flop with set and reset; positive edge trigger | |
| 74LVC1G99GN | Ultra-configurable multiple function gate; 3-state | |
| 74LVC2G02GN | Dual 2-input NOR gate | |
| 74LVC2G86GN | Dual 2-input EXCLUSIVE-OR gate | |
| 74LVC3G06GN | Triple inverter with open-drain output | |
| 74LVC3G07GN | Triple buffer with open-drain output | |
| 74LVC3G14GN | Triple inverting Schmitt trigger with 5 V tolerant input | |
| 74LVC3G34GN | Triple buffer | |
| 74LVC2G126GN | Dual bus buffer/line driver; 3-state | |
| 74LVC2G32GN | Dual 2-input OR gate | |
| 74LVC2G38GN | Dual 2-input NAND gate; open drain | |
| 74LVC2G74GN | Single D-type flip-flop with set and reset; positive edge trigger | |
| 74LVC2T45GN | Dual supply translating transceiver; 3-state | |
| 74LVC3G17GN | Triple non-inverting Schmitt trigger with 5 V tolerant input | |
| 74LVC2G00GN | Dual 2-input NAND gate | |
| 74LVC2G08GN | Dual 2-input AND gate | |
| 74LVC2G125GN | Dual bus buffer/line driver; 3-state | |
| 74LVC2G240GN | Dual inverting buffer/line driver; 3-state | |
| 74LVC2G241GN | Dual buffer/line driver; 3-state | |
| 74LVC3G04GN | Triple inverter | |
| 74LVC3GU04GN | Triple unbuffered inverter | |
| 74LVCH2T45GN | Dual supply translating transceiver; 3-state | |
| 74LVC2G53GN | 2-channel analog multiplexer/demultiplexer | |
| 74LVC1G53GN | 2-channel analog multiplexer/demultiplexer | |
| 74LVC2G66GN | Bilateral switch | |
| 74AVCH2T45GN | Dual-bit, dual-supply voltage level translator/transceiver; 3-state | |
| 74AUP1G74GN | Low-power D-type flip-flop with set and reset; positive-edge trigger | |
| 74LVC1G123GN | Single retriggerable monostable multivibrator; Schmitt trigger inputs |