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74LVC2G00

Dual 2-input NAND gate

The 74LVC2G00 is a dual 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 1.65 V to 5.5 V

  • 5 V tolerant outputs for interfacing with 5 V logic

  • High noise immunity

  • ±24 mA output drive (VCC = 3.0 V)

  • CMOS low power dissipation

  • IOFF circuitry provides partial Power-down mode operation

  • Complies with JEDEC standard:

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8-B/JESD36 (2.7 V to 3.6 V)

  • Latch-up performance exceeds 250 mA

  • Direct interface with TTL levels

  • Overvoltage tolerant inputs to 5.5 V

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC2G00DCProduction1.65 - 5.5CMOS/LVTTL± 322.21752low-40~12520032.4110VSSOP8
74LVC2G00DPProduction1.65 - 5.5CMOS/LVTTL± 322.21752low-40~12521018.8104TSSOP8
74LVC2G00GNProduction1.65 - 5.5CMOS/LVTTL± 322.21752low-40~1252319.5142XSON8
74LVC2G00GSProduction1.65 - 5.5CMOS/LVTTL± 322.21752low-40~1252699.7141XSON8
74LVC2G00GTProduction1.65 - 5.5CMOS/LVTTL± 322.21752low-40~1253175.6150XSON8
74LVC2G00GXProduction1.65 - 5.5CMOS/LVTTL± 322.21752low-40~125---X2SON8

Package

Type numberPackagePackage informationReflow-/Wave solderingPackingStatusMarkingOrderable part number, (Ordering code (12NC))
74LVC2G00DC
VSSOP8
(SOT765-1)
SOT765-1SOT765-1_125ActiveV0074LVC2G00DC,125
( 9352 752 24125 )
74LVC2G00DP
TSSOP8
(SOT505-2)
SOT505-2SOT505-2_125ActiveV2G0074LVC2G00DP,125
( 9352 735 81125 )
74LVC2G00GN
XSON8
(SOT1116)
SOT1116REFLOW_BG-BD-1
SOT1116_115ActiveVA74LVC2G00GN,115
( 9352 922 36115 )
74LVC2G00GS
XSON8
(SOT1203)
SOT1203REFLOW_BG-BD-1
SOT1203_115ActiveVA74LVC2G00GS,115
( 9352 923 81115 )
74LVC2G00GT
XSON8
(SOT833-1)
SOT833-1SOT833-1_115ActiveV0074LVC2G00GT,115
( 9352 789 18115 )
74LVC2G00GX
X2SON8
(SOT1233-2)
SOT1233-2SOT1233-2_115ActiveVA74LVC2G00GXX
( 9353 084 44115 )

Environmental information

Type numberOrderable part numberChemical contentRoHSRHF-indicatorLeadfree conversion date
74LVC2G00DC74LVC2G00DC,12574LVC2G00DCweek 1, 2005
74LVC2G00DP74LVC2G00DP,12574LVC2G00DPweek 41, 2004
74LVC2G00GN74LVC2G00GN,11574LVC2G00GNAlways Pb-free
74LVC2G00GS74LVC2G00GS,11574LVC2G00GSAlways Pb-free
74LVC2G00GT74LVC2G00GT,11574LVC2G00GTAlways Pb-free
74LVC2G00GX74LVC2G00GXX74LVC2G00GXweek 25, 2019
Quality and reliability disclaimer

Documentation (17)

File nameTitleTypeDate
74LVC2G00Dual 2-input NAND gateData sheet2023-08-14
AN10161PicoGate Logic footprintsApplication note2002-10-29
AN11009Pin FMEA for LVC familyApplication note2019-01-09
lvc2g0074LVC2G00 IBIS modelIBIS model2014-10-20
Nexperia_document_leaflet_Logic_X2SON_packages_062018X2SON ultra-small 4, 5, 6 & 8-pin leadless packagesLeaflet2018-06-05
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
SOT1233-2plastic thermal enhanced extremely thin small outline package; no leads;8 terminals; body 1.35 x 0.8 x 0.32 mmPackage information2022-04-21
SOT505-2plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm bodyPackage information2022-06-03
MAR_SOT1203MAR_SOT1203 TopmarkTop marking2013-06-03
SOT1203plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm bodyPackage information2022-06-03
REFLOW_BG-BD-1Reflow soldering profileReflow soldering2021-04-06
MAR_SOT833MAR_SOT833 TopmarkTop marking2013-06-03
SOT833-1plastic, leadless extremely thin small outline package; 8 terminals; 0.5 mm pitch; 1 mm x 1.95 mm x 0.5 mm bodyPackage information2022-06-03
SOT765-1plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm bodyPackage information2022-06-03
MAR_SOT1116MAR_SOT1116 TopmarkTop marking2013-06-03
SOT1116plastic, leadless extremely thin small outline package; 8 terminals; 0.3 mm pitch; 1.2 mm x 1 mm x 0.35 mm bodyPackage information2022-06-02
REFLOW_BG-BD-1Reflow soldering profileReflow soldering2021-04-06

Support

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Models

File nameTitleTypeDate
lvc2g0074LVC2G00 IBIS modelIBIS model2014-10-20

Sample

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