74AUP2G79GF NRND

Low-power dual D-type flip-flop; positive-edge trigger

The 74AUP2G79 provides the dual positive-edge triggered D-type flip-flop. Information on the data input (nD) is transferred to the nQ output on the LOW-to-HIGH transition of the clock pulse (nCP). The nD input must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.

Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

Not recommended for new designs (NRND), click here for the alternative product.

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74AUP2G79GF 74AUP2G79GF,115 935291493115 SOT1089 Order product

Features

  • Wide supply voltage range from 0.8 V to 3.6 V
  • High noise immunity
  • Complies with JEDEC standards:
    • JESD8-12 (0.8 V to 1.3 V)
    • JESD8-11 (0.9 V to 1.65 V)
    • JESD8-7 (1.2 V to 1.95 V)
    • JESD8-5 (1.8 V to 2.7 V)
    • JESD8-B (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F Class 3A exceeds 5000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Latch-up performance exceeds 100 mA per JESD78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Target applications

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AUP2G79GF
NRND
Not for design in1.1 - 3.6CMOS+/- 1.98.5400ultra low-40~1252542.1124XSON8

Package

Type numberOrderable part number, (Ordering code (12NC))StatusMarkingPackageOutline versionReflow-/Wave solderingPacking
74AUP2G79GF
NRND
74AUP2G79GF,115
( 9352 914 93115 )
ActivepP
XSON8
(SOT1089)
SOT1089Reel 7" Q1/T1

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFMSLMSL leadfree
74AUP2G79GF
NRND
74AUP2G79GF,11574AUP2G79GF11
Quality and reliability disclaimer

Documentation (6)

File nameTitleTypeDate
74AUP2G79Low-power dual D-type flip-flop; positive-edge triggerData sheet2019-07-24
AN11052Pin FMEA for AUP familyApplication note2019-01-09
aup2g79aup2g79 IBIS modelIBIS model2013-04-07
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Leaflet2019-04-12
SOT1089_115XSON8; Reel pack; SMD, 7" Q1/T1 Standard product orientation Orderable part number ending ,115 or X Ordering code (12NC) ending 115Packing2013-04-23
SOT1089plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.5 mm bodyOutline drawing2019-05-28

Support

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Models

File nameTitleTypeDate
aup2g79aup2g79 IBIS modelIBIS model2013-04-07

Ordering, pricing & availability

Type numberOrderable part numberOrdering code (12NC)PackingBuy online
74AUP2G79GF74AUP2G79GF,115935291493115Reel 7" Q1/T1Order product

Sample

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Sample orders normally take 2-4 days for delivery.

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