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74AUP2G125GX ECAD models PCB Symbol, Footprint & ECAD Model

Low-power dual buffer/line driver; 3-state

The 74AUP2G125 provides the dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A HIGH level at pin nOE causes the output to assume a high-impedance OFF-state. This device has the input-disable feature, which allows floating input signals. The inputs are disabled when the output enable input nOE) is HIGH.

Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74AUP2G125GX 74AUP2G125GXX 935308442115 SOT1233 Order product

Features

  • Wide supply voltage range from 0.8 V to 3.6 V
  • High noise immunity
  • Complies with JEDEC standards:
    • JESD8-12 (0.8 V to 1.3 V)
    • JESD8-11 (0.9 V to 1.65 V)
    • JESD8-7 (1.2 V to 1.95 V)
    • JESD8-5 (1.8 V to 2.7 V)
    • JESD8-B (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F Class 3A exceeds 5000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Latch-up performance exceeds 100 mA per JESD78B Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • Input-disable feature allows floating input conditions
  • IOFF circuitry provides partial power-down mode operation
  • Multiple package options
  • Specified from –40 ℃ to +85 ℃ and –40 ℃ to +125 ℃

Target applications

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)fmax (MHz)No of bitsPower dissipation considerationsTamb (°C)Package name
74AUP2G125GXProduction0.8 - 3.6CMOS± 1.9702ultra low-40~125X2SON8

Package

Type numberOrderable part number, (Ordering code (12NC))StatusMarkingPackageOutline versionReflow-/Wave solderingPacking
74AUP2G125GX74AUP2G125GXX
( 9353 084 42115 )
ActiveStandard Marking
X2SON8
(SOT1233)
SOT1233Reel 7" Q1/T1

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFMSLMSL leadfree
74AUP2G125GX74AUP2G125GXX74AUP2G125GX11
Quality and reliability disclaimer

Documentation (6)

File nameTitleTypeDate
74AUP2G125Low-power dual buffer/line driver; 3-stateData sheet2017-07-14
aup2g125aup2g125 IBIS modelIBIS model2013-04-07
Nexperia_document_leaflet_Logic_X2SON_packages_062018X2SON ultra-small 4, 5, 6 & 8-pin leadless packagesLeaflet2018-06-05
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Leaflet2019-04-12
SOT1233_115X2SON8; Reel pack; SMD, 7" Q1/T1 standard product orientation Orderable part number ending ,115 or X Ordering code (12NC) ending 115Packing2016-06-30
SOT1233plastic, leadless thermal enhanced extremely thin small outline package; 8 terminals; 0.5 mm pitch; 1.35 mm x 0.8 mm x 0.35 mm bodyOutline drawing2018-05-25

Support

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Models

File nameTitleTypeDate
aup2g125aup2g125 IBIS modelIBIS model2013-04-07

Ordering, pricing & availability

Type numberOrderable part numberOrdering code (12NC)PackingBuy online
74AUP2G125GX74AUP2G125GXX935308442115Reel 7" Q1/T1Order product

Sample

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