74LVC2G08DP-Q100

Dual 2-input AND gate

Automotive qualified

The 74LVC2G08-Q100 provides a 2-input AND gate function.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC2G08-Q100 as a translator in a mixed 3.3V and 5V environment.

This device is fully specified for partial power-down applications using I_OFF. The I_OFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Dual 2-input AND gate

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SKU	Stock*	MOQ	Price per unit**	Quantity

Buy from distributors

Seller	SKU	Stock	MOQ		1	10	100	1,000	10,000	Purchase

Seller	SKU	Stock	MOQ		1	10	100	1,000	10,000	Purchase

Seller	SKU	Stock	MOQ		1	10	100	1,000	10,000	Purchase

Seller	SKU	Stock	MOQ		1	10	100	1,000	10,000	Purchase

* Stock values are subject to change
** Displayed price per unit is based on small quantity orders
*** Authorized resellers for overstock, mature, and discontinued products which are warranted for reliability by the reseller, no longer by Nexperia

Features and benefits

Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40°C to +85°C and from -40°C to +125°C
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant outputs for interfacing with 5 V logic
High noise immunity
±24 mA output drive (V_CC = 3.0V)
CMOS low power consumption
Complies with JEDEC standard:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8-B/JESD36 (2.7 V to 3.6V)
Latch-up performance exceeds 250mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
ESD protection:
- MIL-STD-883, method 3015 exceeds 2000V
- HBM JESD22-A114F exceeds 2000V
- MM JESD22-A115-A exceeds 200 V (C = 200pF, R = 0Ω)
Multiple package options

Applications

Parametrics

Type number	Product status	V_CC (V)	Logic switching levels	Output drive capability (mA)	t_pd (ns)	f_max (MHz)	Nr of bits	Power dissipation considerations	T_amb (°C)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name
74LVC2G08DP-Q100	Production	1.65 - 5.5	CMOS/LVTTL	± 24	2.1	150	2	low	-40~125	210	18.8	104	TSSOP8

Package

Type number	Orderable part number, (Ordering code (12NC))	Status	Marking	Package	Package information	Reflow-/Wave soldering	Packing
74LVC2G08DP-Q100	74LVC2G08DP-Q100H ( 9353 015 55125 )	Active	V08	TSSOP8 (SOT505-2)	SOT505-2		Reel 7" Q3/T4, Reverse

Quality, reliability & chemical content

Type number	Orderable part number	Chemical content	RoHS / RHF	Leadfree conversion date	MSL	MSL leadfree
74LVC2G08DP-Q100	74LVC2G08DP-Q100H	74LVC2G08DP-Q100		Always Pb-free	1	1

Quality and reliability disclaimer

Series

74LVC2G08-Q100 - Dual 2-input AND gate

Documentation (5)

File name	Title	Type	Date
74LVC2G08_Q100	Dual 2-input AND gate	Data sheet	2019-01-28
AN10161	PicoGate Logic footprints	Application note	2002-10-29
AN11009	Pin FMEA for LVC family	Application note	2019-01-09
lvc2g08	74LVC2G08 IBIS model	IBIS model	2014-10-20
74LVC2G08DP-Q100_Nexperia_Product_Reliability	74LVC2G08DP-Q100 Nexperia Product Reliability	Quality document	2022-05-04

Support

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Models

File name	Title	Type	Date
lvc2g08	74LVC2G08 IBIS model	IBIS model	2014-10-20

Ordering, pricing & availability

Type number	Orderable part number	Ordering code (12NC)	Packing	Packing quantity	Buy online
74LVC2G08DP-Q100	74LVC2G08DP-Q100H	935301555125	Reel 7" Q3/T4, Reverse	-	Order product

Sample

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