74AUP1G00GS

Low-power 2-input NAND gate

The 74AUP1G00 provides the single 2-input NAND function.

Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74AUP1G00GS 74AUP1G00GS,132 935291534132 SOT1202 Order product

Features

  • Wide supply voltage range from 0.8 V to 3.6 V
  • High noise immunity
  • Complies with JEDEC standards:
    • JESD8-12 (0.8 V to 1.3 V)
    • JESD8-11 (0.9 V to 1.65 V)
    • JESD8-7 (1.2 V to 1.95 V)
    • JESD8-5 (1.8 V to 2.7 V)
    • JESD8-B (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F Class 3A exceeds 5000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Target applications

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)No of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AUP1G00GSProduction1.1 - 3.6CMOS± 1.98.3701ultra low-40~12532128.7215XSON6

Package

Type numberOrderable part number, (Ordering code (12NC))StatusMarkingPackageOutline versionReflow-/Wave solderingPacking
74AUP1G00GS74AUP1G00GS,132
( 9352 915 34132 )
ActivepA
XSON6
(SOT1202)
SOT1202Reel 7" Q1/T1, Q3/T4

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFMSLMSL leadfree
74AUP1G00GS74AUP1G00GS,13274AUP1G00GS11
Quality and reliability disclaimer

Documentation (6)

File nameTitleTypeDate
74AUP1G00Low-power 2-input NAND gateData sheet2019-04-23
AN11052Pin FMEA for AUP familyApplication note2019-01-09
aup1g0074AUP1G00 IBIS modelIBIS model2014-12-04
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Leaflet2019-04-12
SOT1202_132Reversed product orientation 12NC ending 132Packing2013-04-04
SOT1202plastic, leadless extremely thin small outline package; 6 terminals; 0.35 mm pitch; 1 mm x 1mm x 0.35 mm bodyOutline drawing2018-11-14

Support

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Models

File nameTitleTypeDate
aup1g0074AUP1G00 IBIS modelIBIS model2014-12-04

Ordering, pricing & availability

Type numberOrderable part numberOrdering code (12NC)PackingBuy online
74AUP1G00GS74AUP1G00GS,132935291534132Reel 7" Q1/T1, Q3/T4Order product

Sample

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Sample orders normally take 2-4 days for delivery.

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