74LVC2G02DC

Dual 2-input NOR gate

The 74LVC2G02 is a dual 2-input NOR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using I_OFF. The I_OFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Alternatives

74LVC2G02DC-Q100

Automotive qualified

Dual 2-input NOR gate

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SKU	Stock*	MOQ	Price per unit**	Quantity

Buy from distributors

Seller	SKU	Stock	MOQ		1	10	100	1,000	10,000	Purchase

Seller	SKU	Stock	MOQ		1	10	100	1,000	10,000	Purchase

Seller	SKU	Stock	MOQ		1	10	100	1,000	10,000	Purchase

Seller	SKU	Stock	MOQ		1	10	100	1,000	10,000	Purchase

* Stock values are subject to change
** Displayed price per unit is based on small quantity orders
*** Authorized resellers for overstock, mature, and discontinued products which are warranted for reliability by the reseller, no longer by Nexperia

Features and benefits

Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant outputs for interfacing with 5 V logic
Overvoltage tolerant inputs to 5.5 V
High noise immunity
±24 mA output drive (V_CC = 3.0 V)
CMOS low power consumption
I_OFF circuitry provides partial Power-down mode operation
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Complies with JEDEC standard:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C

Applications

Parametrics

Type number	Product status	V_CC (V)	Logic switching levels	Output drive capability (mA)	t_pd (ns)	f_max (MHz)	No of bits	Power dissipation considerations	T_amb (°C)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name
74LVC2G02DC	Production	1.65 - 5.5	CMOS/LVTTL	± 32	2.4	150	2	low	-40~125	200	32.4	110	VSSOP8

Package

Type number	Orderable part number, (Ordering code (12NC))	Status	Marking	Package	Package information	Reflow-/Wave soldering	Packing
74LVC2G02DC	74LVC2G02DC,125 ( 9352 746 87125 )	Active	V02	VSSOP8 (SOT765-1)	SOT765-1		Reel 7" Q3/T4, Reverse

Quality, reliability & chemical content

Type number	Orderable part number	Chemical content	RoHS / RHF	EFR	IFR	MTBF (hour)	MSL	MSL leadfree
74LVC2G02DC	74LVC2G02DC,125	74LVC2G02DC		19.3	0.5	2E9	1	1

Quality and reliability disclaimer

Series

74LVC2G02 - Dual 2-input NOR gate

Documentation (4)

File name	Title	Type	Date
74LVC2G02	Dual 2-input NOR gate	Data sheet	2021-07-21
AN10161	PicoGate Logic footprints	Application note	2002-10-29
AN11009	Pin FMEA for LVC family	Application note	2019-01-09
lvc2g02	74LVC2G02 IBIS model	IBIS model	2014-10-20

Support

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Models

File name	Title	Type	Date
lvc2g02	74LVC2G02 IBIS model	IBIS model	2014-10-20

Ordering, pricing & availability

Type number	Orderable part number	Ordering code (12NC)	Packing	Buy online
74LVC2G02DC	74LVC2G02DC,125	935274687125	Reel 7" Q3/T4, Reverse	Order product

Sample

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