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74HC4040DB

12-stage binary ripple counter

The 74HC4040; 74HCT4040 is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve parallel outputs (Q0 to Q11). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the state of CP. Each counter stage is a static toggle flip-flop. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Not recommended for new designs (NRND).

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors

Features and benefits

  • Wide supply voltage range from 2.0 V to 6.0 V
  • CMOS low power dissipation
  • High noise immunity
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards:
    • JESD8C (2.7 V to 3.6 V)
    • JESD7A (2.0 V to 6.0 V)
  • Input levels:
    • For 74HC4040: CMOS level
    • For 74HCT4040: TTL level
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Applications

  • Frequency dividing circuits
  • Time delay circuits
  • Control counters

Parametrics

Type numberProduct statusPackage name
74HC4040DB
NRND
End of lifeSSOP16

Documentation (5)

File nameTitleTypeDate
AN11044Pin FMEA 74HC/74HCT familyApplication note2019-01-09
hchc Spice modelSPICE model2013-05-06
HCT_USER_GUIDEHC/T User GuideUser manual1997-10-31
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SSOP-TSSOP-VSO-REFLOWFootprint for reflow solderingReflow soldering2009-10-08

Support

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Models

File nameTitleTypeDate
hchc Spice modelSPICE model2013-05-06