74LVT573PW

3.3 V octal D-type transparent latch; 3-state

The 74LVT573 is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is an octal transparent latch coupled to eight 3-state output buffers. The two sections of the device are controlled independently by Latch Enable (LE) and Output Enable (OE) control gates. The 74LVT573 has a broadside pinout configuration to facilitate PC board layout and allow easy interface with microprocessors.

The data on the Dn inputs are transferred to the latch outputs when the Latch Enable (LE) input is High. The latch remains transparent to the data inputs while LE is High, and stores the data that is present one setup time before the High-to-Low enable transition.

The 3-state output buffers are designed to drive heavily loaded 3-state buses, MOS memories, or MOS microprocessors. The active-Low Output Enable (OE) controls all eight 3-state buffers independent of the latch operation.

When OE is Low, the latched or transparent data appears at the outputs. When OE is High, the outputs are in the High-impedance “OFF” state, which means they will neither drive nor load the bus.

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74LVT573PW 74LVT573PW,118 935176360118 SOT360-1 Order product
74LVT573PW 74LVT573PW,112 935176360112 SOT360-1 Order product

Features

  • Inputs and outputs arranged for easy interfacing to microprocessors
  • 3-state outputs for bus interfacing
  • Common output enable control
  • TTL input and output switching levels
  • Input and output interface capability to systems at 5 V supply
  • Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
  • Live insertion and extraction permitted
  • No bus current loading when output is tied to 5 V bus
  • Power-up reset
  • Power-up 3-state
  • Latch-up protection
    • JESD78 class II exceeds 500 mA
  • ESD protection:
    • HBM JESD22-A114E exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
  • Specified from -40 °C to +85 °C

Target applications

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)No of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVT573PWProduction2.7 - 3.6TTL-32/+642.78medium-40~851004.544TSSOP20

Package

Type numberOrderable part number, (Ordering code (12NC))StatusMarkingPackageOutline versionReflow-/Wave solderingPacking
74LVT573PW74LVT573PW,118
( 9351 763 60118 )
ActiveLVT573
TSSOP20
(SOT360-1)
SOT360-1SSOP-TSSOP-VSO-WAVE
Reel 13" Q1/T1
74LVT573PW,112
( 9351 763 60112 )
ActiveLVT573Bulk Pack

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFEFRIFRMTBF (hour)MSLMSL leadfree
74LVT573PW74LVT573PW,11874LVT573PW70.81.337.52E811
74LVT573PW74LVT573PW,11274LVT573PW70.81.337.52E811
Quality and reliability disclaimer

Documentation (6)

File nameTitleTypeDate
74LVT5733.3 V octal D-type transparent latch; 3-stateData sheet2017-05-04
lvt573lvt573 IBIS modelIBIS model2013-04-07
lvtlvt Spice modelSPICE model2013-05-06
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT360-1_118TSSOP20; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering code (12NC) ending 118Packing2013-04-15
SOT360-1plastic, thin shrink small outline package; 20 leads; 0.65 mm pitch; 6.5 mm x 4.4 mm x 1.1 mm bodyOutline drawing2018-10-18

Support

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Models

File nameTitleTypeDate
lvt573lvt573 IBIS modelIBIS model2013-04-07
lvtlvt Spice modelSPICE model2013-05-06

Ordering, pricing & availability

Type numberOrderable part numberOrdering code (12NC)PackingBuy online
74LVT573PW74LVT573PW,118935176360118Reel 13" Q1/T1Order product
74LVT573PW74LVT573PW,112935176360112Bulk PackOrder product

Sample

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Sample orders normally take 2-4 days for delivery.

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