The 74AHC123A; 74AHCT123A are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.

The 74AHC123A; 74AHCT123A are dual retriggerable monostable multivibrators with output pulse width control by three methods. The basic pulse time is programmed by selection of an external resistor (R_EXT) and capacitor (C_EXT).

Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made as long as desired. Alternatively an output delay can be terminated at any time by a LOW-going edge on input nRD, which also inhibits the triggering.

An internal connection from nRD to the input gate makes it possible to trigger the circuit by a positive-going signal at input nRD. The basic output pulse width is essentially determined by the value of the external timing components R_EXT and C_EXT. When C_EXT ≥ 10 nF, the typical output pulse width is defined as: t_W= R_EXT× C_EXT where t_W= pulse width in ns; R_EXT= external resistor in kΩ; C_EXT= external capacitor in pF. Schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input rise and fall times.