74LVC1G14-Q100

Single Schmitt trigger inverter

The 74LVC1G14-Q100 provides the inverting buffer function with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt trigger action at the input makes the circuit tolerant for slower input rise and fall time.

This device is fully specified for partial power-down applications using I_OFF. The I_OFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 1.65 V to 5.5 V
High noise immunity
Complies with JEDEC standard:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8-B/JESD36 (2.7 V to 3.6 V).
±24 mA output drive (V_CC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Unlimited rise and fall times
Input accepts voltages up to 5 V
Multiple package options
ESD protection:
- MIL-STD-883, method 3015 exceeds 2000 V
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 Ω)

Applications

Wave and pulse shaper
Astable multivibrator
Monostable multivibrator

Parametrics

Type number	Product status	V_CC (V)	Logic switching levels	Output drive capability (mA)	f_max (MHz)	No of bits	Power dissipation considerations	T_amb (°C)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name
74LVC1G14GM-Q100	Production	1.65 - 5.5	CMOS/LVTTL	± 32	175	1	low	-40~125	320	8.2	163	XSON6
74LVC1G14GV-Q100	Production	1.65 - 5.5	CMOS/LVTTL	± 32	175	1	low	-40~125	278	68.5	175	TSOP5
74LVC1G14GW-Q100	Production	1.65 - 5.5	CMOS/LVTTL	± 32	175	1	low	-40~125	319	88.0	188	TSSOP5

Package

Type number	Package	Package information	Packing	Status	Marking	Orderable part number, (Ordering code (12NC))
74LVC1G14GM-Q100	XSON6 (SOT886)	SOT886	Reel 7” Q1/T1 or Q2/T3	Active	VF	74LVC1G14GM-Q100X ( 9356 907 63115 )
74LVC1G14GV-Q100	TSOP5 (SOT753)	SOT753	Reel 7" Q3/T4, Reverse	Active	V14	74LVC1G14GV-Q100,1 ( 9352 984 79125 )
74LVC1G14GW-Q100	TSSOP5 (SOT353-1)	SOT353-1	Reel 7" Q3/T4, Reverse	Active	VF	74LVC1G14GW-Q100,1 ( 9352 984 81125 )

Quality, reliability & chemical content

Type number	Orderable part number	Chemical content	Leadfree conversion date	MSL	MSL leadfree
74LVC1G14GM-Q100	74LVC1G14GM-Q100X	74LVC1G14GM-Q100	week 25, 2019	1	1
74LVC1G14GV-Q100	74LVC1G14GV-Q100,1	74LVC1G14GV-Q100	Always Pb-free	1	1
74LVC1G14GW-Q100	74LVC1G14GW-Q100,1	74LVC1G14GW-Q100	Always Pb-free	1	1

Quality and reliability disclaimer

Documentation (8)

File name	Title	Type	Date
74LVC1G14_Q100	Single Schmitt trigger inverter	Data sheet	2021-01-27
lvc1g14	74LVC1G14 IBIS model	IBIS model	2018-05-25
Nexperia_Selection_guide_2021	Nexperia Selection Guide 2021	Selection guide	2021-01-08
SOT353-1	plastic, thin shrink small outline package; 5 leads; 0.65 mm pitch; 2 mm x 1.25 mm x 0.95 mm body	Package information	2020-04-21
SOT886	plastic, leadless extremely thin small outline package; 6 terminals; 0.5 mm pitch; 1 mm x 1.45 mm x 0.5 mm body	Package information	2020-04-21
MAR_SOT886	MAR_SOT886 Topmark	Top marking	2013-06-03
SOT753	plastic, surface-mounted package; 5 leads; 0.95 mm pitch; 2.9 mm x 1.5 mm x 1 mm body	Package information	2020-04-21
MAR_SOT753	MAR_SOT753 Topmark	Top marking	2013-06-03

Support

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Models

File name	Title	Type	Date
lvc1g14	74LVC1G14 IBIS model	IBIS model	2018-05-25

Ordering, pricing & availability

Sample

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