74LVC2G125-Q100

Dual bus buffer/line driver; 3-state

The 74LVC2G125-Q100 provides a dual non-inverting buffer/line driver with 3-state output. The output enable input (pin nOE) controls the 3-state output. A HIGH-level at pin nOE causes the output to assume a high-impedance OFF-state. Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V and 5V environment.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    • Specified from -40°C to +85 °C and from -40°C to +125°C
  • Wide supply voltage range from 1.65V to 5.5V
  • 5 V tolerant input/output for interfacing with 5V logic
  • High noise immunity
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95V)
    • JESD8-5 (2.3 V to 2.7V)
    • JESD8-B/JESD36 (2.7 V to 3.6V)
  • ESD protection:
    • MIL-STD-883, method 3015 exceeds 2000V
    • HBM JESD22-A114F exceeds 2000V
    • MM JESD22-A115-A exceeds 200 V (C = 200pF, R = 0Ω)
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low-power consumption
  • Latch-up performance exceeds 250mA
  • Direct interface with TTL levels
  • Inputs accept voltages up to 5V
  • Multiple package options

Target applications

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)fmax (MHz)No of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC2G125DC-Q100Production1.65 - 5.5CMOS/LVTTL± 321752low-40~12520636.4117VSSOP8
74LVC2G125DP-Q100Production1.65 - 5.5CMOS/LVTTL± 321752low-40~12522021.3107TSSOP8

Package

Type numberPackageOutline versionReflow-/Wave solderingPackingStatusMarkingOrderable part number, (Ordering code (12NC))
74LVC2G125DC-Q100
VSSOP8
(SOT765-1)
SOT765-1Reel 7" Q3/T4, ReverseActiveV2574LVC2G125DC-Q100H
( 9353 009 12125 )
74LVC2G125DP-Q100
TSSOP8
(SOT505-2)
SOT505-2Reel 7" Q3/T4, ReverseActiveV2574LVC2G125DP-Q100H
( 9353 009 15125 )

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateEFRMSLMSL leadfree
74LVC2G125DC-Q10074LVC2G125DC-Q100H74LVC2G125DC-Q100Always Pb-free123.811
74LVC2G125DP-Q10074LVC2G125DP-Q100H74LVC2G125DP-Q100Always Pb-free123.811
Quality and reliability disclaimer

Documentation (9)

File nameTitleTypeDate
74LVC2G125_Q100Dual bus buffer/line driver; 3-stateData sheet2018-09-10
AN10161PicoGate Logic footprintsApplication note2002-10-29
AN11009Pin FMEA for LVC familyApplication note2019-01-09
lvc2g12574LVC2G125 IBIS modelIBIS model2014-10-20
Nexperia_Selection_guide_2020Nexperia Selection Guide 2020Selection guide2020-01-31
SOT505-2plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm bodyOutline drawing2018-11-14
SOT505-2_125TSSOP8; Reel pack for SMD, 7''; Q3/T4 product orientationPacking2020-02-26
SOT765-1plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm bodyOutline drawing2018-11-14
SOT765-1_125VSSOP8; Reel pack for SMD, 7''; Q3/T4 product orientationPacking2020-01-13

Support

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Models

File nameTitleTypeDate
lvc2g12574LVC2G125 IBIS modelIBIS model2014-10-20

Ordering, pricing & availability

Sample

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