Bipolar transistors

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Analog & Logic ICs

Automotive qualified products (AEC-Q100/Q101)

74LVC163PW

Presettable synchronous 4-bit binary counter; synchronous reset

The 74LVC163 is a synchronous presettable binary counter which features an internal look-ahead carry and can be used for high-speed counting. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (pin CP). The outputs (pins Q0 to Q3) of the counters may be preset to a HIGH-level or LOW-level. A LOW-level at the parallel enable input (pin PE) disables the counting action and causes the data at the data inputs (pins D0 to D3) to be loaded into the counter on the positive-going edge of the clock (provided that the set-up and hold time requirements for PE are met). Preset takes place regardless of the levels at count enable inputs (pin CEP and CET). A LOW-level at the master reset input (pin MR) sets all four outputs of the flip-flops (pins Q0 to Q3) to LOW-level after the next positive-going transition on the clock input (pin CP) (provided that the set-up and hold time requirements for PE are met). This action occurs regardless of the levels at input pins PE, CET and CEP. This synchronous reset feature enables the designer to modify the maximum count with only one external NAND gate.

The look-ahead carry simplifies serial cascading of the counters. Both count enable inputs (pin CEP and CET) must be HIGH in count. The CET input is fed forward to enable the terminal count output (pin TC). The TC output thus enabled will produce a HIGH output pulse of a duration approximately equal to a HIGH-level output of Q0. This pulse can be used to enable the next cascaded stage.

The maximum clock frequency for the cascaded counters is determined by tPHL (propagation delay CP to TC) and tsu (set-up time CEP to CP) according to the formula: .

Features and benefits

  • Wide supply voltage range from 1.2 V to 3.6 V

  • Inputs accept voltages up to 5.5 V

  • CMOS low power consumption

  • Direct interface with TTL levels

  • Synchronous reset

  • Synchronous counting and loading

  • Two count enable inputs for n-bit cascading

  • Positive edge-triggered clock

  • Complies with JEDEC standard:

    • JESD8-7A (1.65 V to 1.95 V)

    • JESD8-5A (2.3 V to 2.7 V)

    • JESD8-C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and -40 °C to 125 °C

Parametrics

Type number Product status VCC (V) Output drive capability (mA) Logic switching levels tpd (ns) Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Ψth(j-top) (K/W) Rth(j-c) (K/W) Package name
74LVC163PW Production 1.2 - 3.6 ± 24 CMOS/LVTTL 4.9 low -40~125 125 4.6 54.7 TSSOP16

PCB Symbol, Footprint and 3D Model

Model Name Description

Package

Type number Orderable part number, (Ordering code (12NC)) Status Marking Package Package information Reflow-/Wave soldering Packing
74LVC163PW 74LVC163PW,118
(935210560118)
Active LVC163 SOT403-1
TSSOP16
(SOT403-1)
SOT403-1 SSOP-TSSOP-VSO-WAVE
SOT403-1_118

Environmental information

Type number Orderable part number Chemical content RoHS RHF-indicator
74LVC163PW 74LVC163PW,118 74LVC163PW rohs rhf rhf
Quality and reliability disclaimer

Documentation (12)

File name Title Type Date
74LVC163 Presettable synchronous 4-bit binary counter; synchronous reset Data sheet 2024-02-12
AN11009 Pin FMEA for LVC family Application note 2019-01-09
AN263 Power considerations when using CMOS and BiCMOS logic devices Application note 2023-02-07
SOT403-1 3D model for products with SOT403-1 package Design support 2020-01-22
lvc163 lvc163 IBIS model IBIS model 2013-04-08
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
TSSOP16_SOT403-1_mk plastic, thin shrink small outline package; 16 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body Marcom graphics 2017-01-28
SOT403-1 plastic, thin shrink small outline package; 16 leads; 5 mm x 4.4 mm x 1.2 mm body Package information 2023-11-08
SOT403-1_118 TSSOP16; Reel pack for SMD, 13"; Q1/T1 product orientation Packing information 2020-04-21
74LVC163PW_Nexperia_Product_Reliability 74LVC163PW Nexperia Product Reliability Quality document 2024-06-16
lvc lvc Spice model SPICE model 2013-05-07
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

Support

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Models

File name Title Type Date
lvc163 lvc163 IBIS model IBIS model 2013-04-08
lvc lvc Spice model SPICE model 2013-05-07
SOT403-1 3D model for products with SOT403-1 package Design support 2020-01-22

PCB Symbol, Footprint and 3D Model

Model Name Description

Ordering, pricing & availability

Type number Orderable part number Ordering code (12NC) Status Packing Packing Quantity Buy online
74LVC163PW 74LVC163PW,118 935210560118 Active SOT403-1_118 2,500 Order product

Sample

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How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74LVC163PW 74LVC163PW,118 935210560118 SOT403-1 Order product