Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
- Wide supply voltage range from 0.8 V to 3.6 V
- High noise immunity
- Complies with JEDEC standards:
- JESD8-12 (0.8 V to 1.3 V)
- JESD8-11 (0.9 V to 1.65 V)
- JESD8-7 (1.2 V to 1.95 V)
- JESD8-5 (1.8 V to 2.7 V)
- JESD8-B (2.7 V to 3.6 V)
- ESD protection:
- MIL-STD-883, method 3015 Class 3A exceeds 5000 V
- HBM JESD22-A114F Class 3A exceeds 5000 V
- MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
- Low static power consumption; ICC = 0.9 μA (maximum)
- Latch-up performance exceeds 100 mA per JESD 78 Class II
- Inputs accept voltages up to 3.6 V
- Low noise overshoot and undershoot < 10 % of VCC
- IOFF circuitry provides partial Power-down mode operation
|Type number||Product status||VCC (V)||Logic switching levels||Output drive capability (mA)||tpd (ns)||fmax (MHz)||Power dissipation considerations||Tamb (Cel)||Rth(j-a) (K/W)||Ψth(j-top) (K/W)||Rth(j-c) (K/W)||Package name|
|74AUP1G175GW-Q100||Production||1.1 - 3.6||CMOS||+/- 1.9||7.4||70||ultra low||-40~125||264||38.6||153||TSSOP6|
|74AUP1G175_Q100||Low-power D-type flip-flop with reset; positive-edge trigger||Data sheet||2017-03-10|
|AN11052||Pin FMEA for AUP family||Application note||2011-05-06|
|AN10156||Sorting through the low voltage logic maze||Application note||2013-03-13|
|aup1g175||aup1g175 IBIS model||IBIS model||2014-12-21|
|aup1g17||74AUP1G17 IBIS model||IBIS model||2018-05-25|
|SOT363_125||Tape reel SMD; reversed product orientation 12NC ending 125||Packing||2012-11-20|
|SOT363||plastic, surface-mounted package; 6 leads; 1.3 mm pitch; 2 mm x 1.25 mm x 0.95 mm body||Outline drawing||2018-02-23|
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