74HC573BQ-Q100

Octal D-type transparant latch; 3-state

The 74HC573-Q100; 74HCT573-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A.

The 74HC573-Q100; 74HCT573-Q100 has octal D-type transparent latches featuring separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A latch enable (LE) input and an output enable (OE) input are common to all latches.

When LE is HIGH, data at the Dn inputs enter the latches. In this condition, the latches are transparent, i.e. a latch output changes state each time its corresponding D input changes.

When LE is LOW the latches store the information that was present at the D-inputs a set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents of the 8 latches are available at the outputs. When OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the latches.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Octal D-type transparant latch; 3-state

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Features

Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Input levels:
- For 74HC573: CMOS level
- For 74HCT573: TTL level
Inputs and outputs on opposite sides of package allowing easy interface with microprocessors
Useful as input or output port for microprocessors and microcomputers
3-state non-inverting outputs for bus-oriented applications
Common 3-state output enable input
Multiple package options
ESD protection:
- MIL-STD-883, method 3015 exceeds 2000 V
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

Target applications

Parametrics

Type number	Product status	V_CC (V)	Logic switching levels	Output drive capability (mA)	t_pd (ns)	f_max (MHz)	Power dissipation considerations	T_amb (Cel)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name
74HC573BQ-Q100	Production	2.0 - 6.0	CMOS	+/- 7.8	14	8	low	-40~125	79	9.4	50	DHVQFN20

Package

Type number	Orderable part number, (Ordering code (12NC))	Status	Marking	Package	Outline version	Reflow-/Wave soldering	Packing
74HC573BQ-Q100	74HC573BQ-Q100,115 ( 9352 988 63115 )	Active	HC573	DHVQFN20 (SOT764-1)	SOT764-1		Reel 7" Q1/T1

Quality, reliability & chemical content

Type number	Orderable part number	Chemical content	RoHS / RHF	Leadfree conversion date	EFR	MSL	MSL leadfree
74HC573BQ-Q100	74HC573BQ-Q100,115	74HC573BQ-Q100		Always Pb-free	84.9	1	1

Quality and reliability disclaimer

Series

74HC(T)573-Q100 - Octal D-type transparant latch; 3-state

Documentation (5)

File name	Title	Type	Date
74HC_HCT573_Q100	Octal D-type transparant latch; 3-state	Data sheet	2017-03-30
AN11044	Pin FMEA 74HC/74HCT family	Application note	2019-01-09
HCT_USER_GUIDE	HC/T User Guide	User manual	1997-10-31
SOT764-1_115	DHVQFN20; Reel pack; SMD, 7" Q1/T1 Standard product orientation Orderable part number ending ,115 or X Ordering code (12NC) ending 115	Packing	2013-04-23
SOT764-1	plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 20 terminals; 0.5 mm pitch; 4.5 mm x 2.5 mm x 1 mm body	Outline drawing	2018-11-14

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Ordering, pricing & availability

Type number	Orderable part number	Ordering code (12NC)	Packing	Buy online
74HC573BQ-Q100	74HC573BQ-Q100,115	935298863115	Reel 7" Q1/T1	Order product

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