74LV165APW-Q100

8-bit parallel-in/serial-out shift register

The 74LV165A-Q100 is an 8-bit parallel-load or serial-in shift register with complementary serial outputs (Q7 and Q7) available from the last stage. When the parallel-load input (PL) is LOW, parallel data from the inputs D0 to D7 are loaded into the register asynchronously. When input PL is HIGH, data enters the register serially at the input DS. It shifts one place to the right (Q0 → Q1 → Q2, etc.) with each positive-going clock transition. This feature allows parallel-to-serial converter expansion by tying the output Q7 to the input DS of the succeeding stage. The clock input is a gate-OR structure which allows one input to be used as an active LOW clock enable input (CE) input. The pin assignment for the inputs CP and CE is arbitrary and can be reversed for layout convenience. The LOW-to-HIGH transition of the input CE should only take place while CP HIGH for predictable operation.

Schmitt-trigger action at all inputs, makes the circuit tolerant for slower input rise and fall times. It is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging current backflow through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 3) and is suitable for use in automotive applications.

Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 3)
    • Specified from -40 °C to +85 °C
  • Wide supply voltage range from 2.0 V to 5.5 V
  • Synchronous parallel-to-serial applications
  • Synchronous serial input for easy expansion
  • Latch-up performance exceeds 250 mA
  • CMOS LOW power consumption
  • 5.5 V tolerant inputs/outputs
  • Direct interface with TTL levels (2.7 V to 3.6 V)
  • Power-down mode
  • Complies with JEDEC standards:
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8B/JESD36 (2.7 V to 3.6 V)
    • JESD8-1A (4.5 V to 5.5 V)
  • ESD protection:
    • MIL-STD-833, method 3015 exceeds 2000 V
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

Target applications

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LV165APW-Q100Production1.0 - 5.5TTL+/- 127.5115low-40~1251254.454TSSOP16

Package

Type numberPackageOutline versionReflow-/Wave solderingPackingStatusMarkingOrderable part number, (Ordering code (12NC))
74LV165APW-Q100
TSSOP16
(SOT403-1)
SOT403-1SSOP-TSSOP-VSO-WAVE
Reel 13" Q1/T1ActiveLV165A74LV165APW-Q100J
( 9353 013 62118 )

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateEFRMSLMSL leadfree
74LV165APW-Q10074LV165APW-Q100J74LV165APW-Q100Always Pb-free144.911
Quality and reliability disclaimer

Documentation (5)

File nameTitleTypeDate
74LV165A_Q1008-bit parallel-in/serial-out shift registerData sheet2017-04-07
AN10156Sorting through the low voltage logic mazeApplication note2013-03-13
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT403-1_118TSSOP16; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering code (12NC) ending 118Packing2013-04-08
SOT403-1plastic, thin shrink small outline package; 16 leads; 5 mm x 4.4 mm x 1.1 mm bodyOutline drawing2018-11-14

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