Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
- 5 V tolerant inputs/outputs for interfacing with 5 V logic
- Wide supply voltage range from 1.2 V to 3.6 V
- CMOS low-power consumption
- Direct interface with TTL levels
- Balanced propagation delays
- All inputs have Schmitt-trigger action
- Complies with JEDEC standard:
- JESD8-7A (1.65 V to 1.95 V)
- JESD8-5A (2.3 V to 2.7 V)
- JESD8-C/JESD36 (2.7 V to 3.6 V)
- ESD protection:
- MIL-STD-883, method 3015 exceeds 2000 V
- HBM JESD22-A114F exceeds 2000 V
- Serial-to-parallel data conversion
- Remote control holding register
|Type number||Product status||VCC (V)||Logic switching levels||Output drive capability (mA)||tpd (ns)||fmax (MHz)||Power dissipation considerations||Tamb (Cel)||Rth(j-a) (K/W)||Ψth(j-top) (K/W)||Rth(j-c) (K/W)||Package name|
|74LVC594ABQ-Q100||Production||1.2 - 5.5||CMOS/LVTTL||+/- 24||3.1||180||low||-40~125||92||13.3||61||DHVQFN16|
|74LVC594A_Q100||8-bit shift register with output register||Data sheet||2017-07-21|
|AN240||Interfacing 3 Volt and 5 Volt Applications||Application note||1995-09-14|
|AN263||Power considerations when using CMOS and BiCMOS logic devices||Application note||2002-02-04|
|AN11009||Pin FMEA for LVC family||Application note||2011-02-04|
|AN10156||Sorting through the low voltage logic maze||Application note||2013-03-13|
|SOT763-1_115||DHVQFN16; Reel pack, SMD, 7" Q1/T1 standard product orientation Orderable part number ending ,115 or X Ordering code (12NC) ending 115||Packing||2016-07-05|
|SOT763-1||plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 16 terminals; 0.5 mm pitch; 3.5 mm x 2.5 mm x 0.85 mm body||Outline drawing||2018-10-18|
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