TSSOP8 (SOT505-2)

plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm body

Package information

Package version	Package name	Package description	Reference	Issue date
SOT505-2	TSSOP8	plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm body		2002-01-16

File name	Title	Type	Date
SOT505-2	3D model for products with SOT505-2 package	Design support	2019-01-18
Nexperia_document_guide_MiniLogic_PicoGate_201901	PicoGate leaded logic portfolio guide	Brochure	2019-01-07
Nexperia_package_poster	Nexperia package poster	Leaflet	2019-03-01

Products in this package

Analog & Logic ICs
Type number	Description	Quick access
74AHC2G00DP	Dual 2-input NAND gate	Parametrics Samples
74AHC2G00DP-Q100	Dual 2-input NAND gate	Parametrics Samples
74AHC2G08DP	Dual 2-input AND gate	Parametrics Samples
74AHC2G08DP-Q100	Dual 2-input AND gate	Parametrics Samples
74AHC2G125DP	Dual buffer/line driver; 3-state	Parametrics Samples
74AHC2G125DP-Q100	Dual buffer/line driver; 3-state	Parametrics Samples
74AHC2G126DP	Dual buffer/line driver; 3-state	Parametrics Samples
74AHC2G126DP-Q100	Dual buffer/line driver; 3-state	Parametrics Samples
74AHC2G241DP	Dual buffer/line driver; 3-state	Parametrics
74AHC2G241DP-Q100	Dual buffer/line driver; 3-state	Parametrics Samples
74AHC2G32DP	Dual 2-input OR gate	Parametrics Samples
74AHC2G32DP-Q100	Dual 2-input OR gate	Parametrics Samples
74AHC3G04DP	Inverter	Parametrics Samples
74AHC3G04DP-Q100	Inverter	Parametrics Samples
74AHC3G14DP	Triple inverting Schmitt trigger	Parametrics Samples
74AHC3G14DP-Q100	Triple inverting Schmitt trigger	Parametrics Samples
74AHC3GU04DP	Triple unbuffered inverter	Parametrics Samples
74AHC3GU04DP-Q100	Triple unbuffered inverter	Parametrics Samples
74AHCT2G08DP	Dual 2-input AND gate	Parametrics Samples
74AHCT2G08DP-Q100	Dual 2-input AND gate	Parametrics Samples
74AHCT2G125DP	Dual buffer/line driver; 3-state	Parametrics Samples
74AHCT2G125DP-Q100	Dual buffer/line driver; 3-state	Parametrics Samples
74AHCT2G32DP	Dual 2-input OR gate	Parametrics Samples
74AHCT2G32DP-Q100	Dual 2-input OR gate	Parametrics Samples
74AHCT3G14DP	Triple inverting Schmitt trigger	Parametrics Samples
74AHCT3G14DP-Q100	Triple inverting Schmitt trigger	Parametrics Samples
74AVC2T45DP	Dual-bit, dual-supply voltage level translator/transceiver; 3-state	Parametrics Samples
74AVC2T45DP-Q100	Dual-bit, dual-supply voltage level translator/transceiver; 3-state	Parametrics Samples
74HC2G00DP	Dual 2-input NAND gate	Parametrics Samples
74HC2G00DP-Q100	Dual 2-input NAND gate	Parametrics Samples
74HC2G02DP	Dual 2-input NOR gate	Parametrics Samples
74HC2G02DP-Q100	Dual 2-input NOR gate	Parametrics Samples
74HC2G08DP	Dual 2-input AND gate	Parametrics Samples
74HC2G08DP-Q100	Dual 2-input AND gate	Parametrics Samples
74HC2G125DP	Dual buffer/line driver; 3-state	Parametrics Samples
74HC2G125DP-Q100	Dual buffer/line driver; 3-state	Parametrics Samples
74HC2G32DP	Dual 2-input OR gate	Parametrics Samples
74HC2G32DP-Q100	Dual 2-input OR gate	Parametrics Samples
74HC2G66DP	Dual single-pole single-throw analog switch	Parametrics Samples
74HC2G66DP-Q100	Dual single-pole single-throw analog switch	Parametrics Samples
74HC2G86DP	Dual 2-input EXCLUSIVE-OR gate	Parametrics Samples
74HC2G86DP-Q100	Dual 2-input EXCLUSIVE-OR gate	Parametrics Samples
74HC3G04DP	Triple inverter	Parametrics Samples
74HC3G04DP-Q100	Triple inverter	Parametrics Samples
74HC3G07DP	Triple buffer with open-drain outputs	Parametrics Samples
74HC3G07DP-Q100	Triple buffer with open-drain outputs	Parametrics Samples
74HC3G14DP	Triple inverting Schmitt trigger	Parametrics Samples
74HC3G14DP-Q100	Triple inverting Schmitt trigger	Parametrics Samples
74HC3G16DP	Triple buffer gate	Parametrics Samples
74HC3G34DP	Triple buffer gate	Parametrics Samples
74HC3G34DP-Q100	Dual non-inverting Schmitt trigger	Parametrics Samples
74HC3GU04DP	Triple unbuffered inverter	Parametrics Samples
74HC3GU04DP-Q100	Triple unbuffered inverter	Parametrics Samples
74HCT2G00DP	Dual 2-input NAND gate	Parametrics Samples
74HCT2G00DP-Q100	Dual 2-input NAND gate	Parametrics Samples
74HCT2G02DP	Dual 2-input NOR gate	Parametrics Samples
74HCT2G02DP-Q100	Dual 2-input NOR gate	Parametrics Samples
74HCT2G08DP	Dual 2-input AND gate	Parametrics Samples
74HCT2G08DP-Q100	Dual 2-input AND gate	Parametrics Samples
74HCT2G125DP	Dual buffer/line driver; 3-state	Parametrics Samples
74HCT2G125DP-Q100	Dual buffer/line driver; 3-state	Parametrics Samples
74HCT2G32DP	Dual 2-input OR gate	Parametrics Samples
74HCT2G32DP-Q100	Dual 2-input OR gate	Parametrics Samples
74HCT2G66DP	Dual single-pole single-throw analog switch	Parametrics Samples
74HCT2G66DP-Q100	Dual single-pole single-throw analog switch	Parametrics Samples
74HCT3G04DP	Triple inverter	Parametrics Samples
74HCT3G04DP-Q100	Triple inverter	Parametrics Samples
74HCT3G07DP	Triple buffer with open-drain outputs	Parametrics
74HCT3G07DP-Q100	Triple buffer with open-drain outputs	Parametrics Samples
74HCT3G14DP	Triple inverting Schmitt trigger	Parametrics Samples
74HCT3G14DP-Q100	Triple inverting Schmitt trigger	Parametrics Samples
74HCT3G34DP	Triple buffer gate	Parametrics Samples
74HCT3G34DP-Q100	Dual non-inverting Schmitt trigger	Parametrics Samples
74LVC1G123DP	Single retriggerable monostable multivibrator; Schmitt trigger inputs	Parametrics Samples
74LVC1G123DP-Q100	Single retriggerable monostable multivibrator; Schmitt trigger inputs	Parametrics Samples
74LVC1G53DP	2-channel analog multiplexer/demultiplexer	Parametrics Samples
74LVC1G53DP-Q100	2-channel analog multiplexer/demultiplexer	Parametrics Samples
74LVC1G74DP	Single D-type flip-flop with set and reset; positive edge trigger	Parametrics Samples
74LVC1G74DP-Q100	Single D-type flip-flop with set and reset; positive edge trigger	Parametrics Samples
74LVC1G99DP	Ultra-configurable multiple function gate; 3-state	Parametrics Samples
74LVC2G00DP	Dual 2-input NAND gate	Parametrics Samples
74LVC2G02DP	Dual 2-input NOR gate	Parametrics Samples
74LVC2G02DP-Q100	Dual 2-input NOR gate	Parametrics Samples
74LVC2G08DP	Dual 2-input AND gate	Parametrics Samples
74LVC2G08DP-Q100	Dual 2-input AND gate	Parametrics Samples
74LVC2G125DP	Dual bus buffer/line driver; 3-state	Parametrics Samples
74LVC2G125DP-Q100	Dual bus buffer/line driver; 3-state	Parametrics Samples
74LVC2G126DP	Dual bus buffer/line driver; 3-state	Parametrics Samples
74LVC2G126DP-Q100	Bus buffer/line driver; 3-state	Parametrics Samples
74LVC2G240DP	Dual inverting buffer/line driver; 3-state	Parametrics Samples
74LVC2G240DP-Q100	Dual inverting buffer/line driver; 3-state	Parametrics Samples
74LVC2G241DP	Dual buffer/line driver; 3-state	Parametrics Samples
74LVC2G241DP-Q100	Dual buffer/line driver; 3-state	Parametrics Samples
74LVC2G32DP	Dual 2-input OR gate	Parametrics Samples
74LVC2G32DP-Q100	Dual 2-input OR gate	Parametrics Samples
74LVC2G38DP	Dual 2-input NAND gate; open drain	Parametrics Samples
74LVC2G53DP	2-channel analog multiplexer/demultiplexer	Parametrics Samples
74LVC2G66DP	Bilateral switch	Parametrics Samples
74LVC2G66DP-Q100	Bilateral switch	Parametrics Samples
74LVC2G74DP	Single D-type flip-flop with set and reset; positive edge trigger	Parametrics Samples
74LVC2G74DP-Q100	Single D-type flip-flop with set and reset; positive edge trigger	Parametrics Samples
74LVC2G86DP	Dual 2-input EXCLUSIVE-OR gate	Parametrics Samples
74LVC2G86DP-Q100	Dual 2-input EXCLUSIVE-OR gate	Parametrics Samples
74LVC3G04DP	Triple inverter	Parametrics Samples
74LVC3G04DP-Q100	Triple inverter	Parametrics Samples
74LVC3G06DP	Triple inverter with open-drain output	Parametrics Samples
74LVC3G07DP	Triple buffer with open-drain output	Parametrics Samples
74LVC3G07DP-Q100	Triple buffer with open-drain output	Parametrics Samples
74LVC3G14DP	Triple inverting Schmitt trigger with 5 V tolerant input	Parametrics Samples
74LVC3G16DP	Triple buffer	Parametrics Samples
74LVC3G17DP	Triple non-inverting Schmitt trigger with 5 V tolerant input	Parametrics Samples
74LVC3G17DP-Q100	Triple non-inverting Schmitt trigger with 5 V tolerant input	Parametrics Samples
74LVC3G34DP	Triple buffer	Parametrics Samples
74LVC3G34DP-Q100	Triple buffer	Parametrics Samples
74LVC3GU04DP	Triple unbuffered inverter	Parametrics
LSF0102DP	2-bit bidirectional multi-voltage level translator; open-drain; push-pull	Parametrics
LSF0102DP-Q100	2-bit bidirectional multi-voltage level translator; open-drain; push-pull	Parametrics
NCA9306DP	2-bit bidirectional multi-voltage level translator; open-drain; push-pull	Parametrics
XC7WH126DP	Dual buffer/line driver; 3-state	Parametrics Samples
XC7WH14DP	Triple inverting Schmitt trigger	Parametrics Samples
XC7WT14DP	Triple inverting Schmitt trigger	Parametrics Samples

Automotive qualified products (AEC-Q100/Q101)
Type number	Description	Quick access
74AHC2G00DP-Q100	Dual 2-input NAND gate	Parametrics Samples
74AHC2G08DP-Q100	Dual 2-input AND gate	Parametrics Samples
74AHC2G125DP-Q100	Dual buffer/line driver; 3-state	Parametrics Samples
74AHC2G126DP-Q100	Dual buffer/line driver; 3-state	Parametrics Samples
74AHC2G241DP-Q100	Dual buffer/line driver; 3-state	Parametrics Samples
74AHC2G32DP-Q100	Dual 2-input OR gate	Parametrics Samples
74AHC3G04DP-Q100	Inverter	Parametrics Samples
74AHC3G14DP-Q100	Triple inverting Schmitt trigger	Parametrics Samples
74AHC3GU04DP-Q100	Triple unbuffered inverter	Parametrics Samples
74AHCT2G08DP-Q100	Dual 2-input AND gate	Parametrics Samples
74AHCT2G125DP-Q100	Dual buffer/line driver; 3-state	Parametrics Samples
74AHCT2G32DP-Q100	Dual 2-input OR gate	Parametrics Samples
74AHCT3G14DP-Q100	Triple inverting Schmitt trigger	Parametrics Samples
74AVC2T45DP-Q100	Dual-bit, dual-supply voltage level translator/transceiver; 3-state	Parametrics Samples
74HC2G00DP-Q100	Dual 2-input NAND gate	Parametrics Samples
74HC2G02DP-Q100	Dual 2-input NOR gate	Parametrics Samples
74HC2G08DP-Q100	Dual 2-input AND gate	Parametrics Samples
74HC2G125DP-Q100	Dual buffer/line driver; 3-state	Parametrics Samples
74HC2G32DP-Q100	Dual 2-input OR gate	Parametrics Samples
74HC2G66DP-Q100	Dual single-pole single-throw analog switch	Parametrics Samples
74HC2G86DP-Q100	Dual 2-input EXCLUSIVE-OR gate	Parametrics Samples
74HC3G04DP-Q100	Triple inverter	Parametrics Samples
74HC3G07DP-Q100	Triple buffer with open-drain outputs	Parametrics Samples
74HC3G14DP-Q100	Triple inverting Schmitt trigger	Parametrics Samples
74HC3G34DP-Q100	Dual non-inverting Schmitt trigger	Parametrics Samples
74HC3GU04DP-Q100	Triple unbuffered inverter	Parametrics Samples
74HCT2G00DP-Q100	Dual 2-input NAND gate	Parametrics Samples
74HCT2G02DP-Q100	Dual 2-input NOR gate	Parametrics Samples
74HCT2G08DP-Q100	Dual 2-input AND gate	Parametrics Samples
74HCT2G125DP-Q100	Dual buffer/line driver; 3-state	Parametrics Samples
74HCT2G32DP-Q100	Dual 2-input OR gate	Parametrics Samples
74HCT2G66DP-Q100	Dual single-pole single-throw analog switch	Parametrics Samples
74HCT3G04DP-Q100	Triple inverter	Parametrics Samples
74HCT3G07DP-Q100	Triple buffer with open-drain outputs	Parametrics Samples
74HCT3G14DP-Q100	Triple inverting Schmitt trigger	Parametrics Samples
74HCT3G34DP-Q100	Dual non-inverting Schmitt trigger	Parametrics Samples
74LVC1G123DP-Q100	Single retriggerable monostable multivibrator; Schmitt trigger inputs	Parametrics Samples
74LVC1G53DP-Q100	2-channel analog multiplexer/demultiplexer	Parametrics Samples
74LVC1G74DP-Q100	Single D-type flip-flop with set and reset; positive edge trigger	Parametrics Samples
74LVC2G02DP-Q100	Dual 2-input NOR gate	Parametrics Samples
74LVC2G08DP-Q100	Dual 2-input AND gate	Parametrics Samples
74LVC2G125DP-Q100	Dual bus buffer/line driver; 3-state	Parametrics Samples
74LVC2G126DP-Q100	Bus buffer/line driver; 3-state	Parametrics Samples
74LVC2G240DP-Q100	Dual inverting buffer/line driver; 3-state	Parametrics Samples
74LVC2G241DP-Q100	Dual buffer/line driver; 3-state	Parametrics Samples
74LVC2G32DP-Q100	Dual 2-input OR gate	Parametrics Samples
74LVC2G66DP-Q100	Bilateral switch	Parametrics Samples
74LVC2G74DP-Q100	Single D-type flip-flop with set and reset; positive edge trigger	Parametrics Samples
74LVC2G86DP-Q100	Dual 2-input EXCLUSIVE-OR gate	Parametrics Samples
74LVC3G04DP-Q100	Triple inverter	Parametrics Samples
74LVC3G07DP-Q100	Triple buffer with open-drain output	Parametrics Samples
74LVC3G17DP-Q100	Triple non-inverting Schmitt trigger with 5 V tolerant input	Parametrics Samples
74LVC3G34DP-Q100	Triple buffer	Parametrics Samples
LSF0102DP-Q100	2-bit bidirectional multi-voltage level translator; open-drain; push-pull	Parametrics

TSSOP8 (SOT505-2)

Package information

Related documents

Products in this package