74AUP1T08GX

Low-power 2-input AND gate with voltage-level translator

The 74AUP1T08 provides the single 2-input AND function. This device ensures a very low static and dynamic power consumption across the entire V_CC range from 2.3 V to 3.6 V.

The 74AUP1T08 is designed for logic-level translation applications with input switching levels that accept 1.8 V low-voltage CMOS signals, while operating from either a single 2.5 V or 3.3 V supply voltage.

The wide supply voltage range ensures normal operation as battery voltage drops from 3.6 V to 2.3 V.

This device is fully specified for partial power-down applications using I_OFF. The I_OFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Schmitt trigger inputs make the circuit tolerant to slower input rise and fall times across the entire V_CC range.

Low-power 2-input AND gate with voltage-level translator

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Seller	SKU	Stock	MOQ		1	10	100	1,000	10,000	Purchase

Seller	SKU	Stock	MOQ		1	10	100	1,000	10,000	Purchase

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* Stock values are subject to change
** Displayed price per unit is based on small quantity orders
*** Authorized resellers for overstock, mature, and discontinued products which are warranted for reliability by the reseller, no longer by Nexperia

Features and benefits

Wide supply voltage range from 2.3 V to 3.6 V
High noise immunity
ESD protection:
- HBM JESD22-A114F Class 3A exceeds 5000 V
- CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I_CC = 1.5 μA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V_CC
I_OFF circuitry provides partial power-down mode operation
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C

Applications

Parametrics

Type number	Product status	V_CC(A) (V)	V_CC(B) (V)	Logic switching levels	Output drive capability (mA)	t_pd (ns)	No of bits	Power dissipation considerations	T_amb (°C)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name
74AUP1T08GX	Production	2.3 - 3.6	n.a.	CMOS	± 1.9	8.7	1	ultra low	-40~125	316	85.8	186	X2SON5

Package

Type number	Orderable part number, (Ordering code (12NC))	Status	Marking	Package	Package information	Reflow-/Wave soldering	Packing
74AUP1T08GX	74AUP1T08GXH ( 9356 900 49125 )	Active	Standard Marking	X2SON5 (SOT1226)	SOT1226		Reel 7" Q3/T4, Reverse

Quality, reliability & chemical content

Type number	Orderable part number	Chemical content	RoHS / RHF	MSL	MSL leadfree
74AUP1T08GX	74AUP1T08GXH	74AUP1T08GX		1	1

Quality and reliability disclaimer

Series

Documentation (6)

File name	Title	Type	Date
74AUP1T08	Low-power 2-input AND gate with voltage-level translator	Data sheet	2017-11-24
Nexperia_document_guide_Logic_translators_201711	Nexperia Logic Translators	Brochure	2017-12-05
aup1t08	IBIS model of 74AUP1T08	IBIS model	2017-12-14
Nexperia_74AUP1Txx_voltage_translators	Single supply logic gates with voltage translation	Leaflet	2018-06-18
Nexperia_document_leaflet_Logic_X2SON_packages_062018	X2SON ultra-small 4, 5, 6 & 8-pin leadless packages	Leaflet	2018-06-05
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904	Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904	Leaflet	2019-04-12

Support

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Models

File name	Title	Type	Date
aup1t08	IBIS model of 74AUP1T08	IBIS model	2017-12-14

Ordering, pricing & availability

Type number	Orderable part number	Ordering code (12NC)	Packing	Buy online
74AUP1T08GX	74AUP1T08GXH	935690049125	Reel 7" Q3/T4, Reverse	Order product

Sample

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