74AVCH2T45GS

Dual-bit, dual-supply voltage level translator/transceiver; 3-state

The 74AVCH2T45 is a dual bit, dual supply transceiver that enables bidirectional level translation. It features two data input-output ports (nA and nB), a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nA and DIR are referenced to VCC(A) and pins nB are referenced to VCC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA.

The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are in the high-impedance OFF-state.

The 74AVCH2T45 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74AVCH2T45GS 74AVCH2T45GS,115 935292794115 SOT1203 Order product

Features

  • Wide supply voltage range:
    • VCC(A): 0.8 V to 3.6 V
    • VCC(B): 0.8 V to 3.6 V
  • High noise immunity
  • Complies with JEDEC standards:
    • JESD8-12 (0.8 V to 1.3 V)
    • JESD8-11 (0.9 V to 1.65 V)
    • JESD8-7 (1.2 V to 1.95 V)
    • JESD8-5 (1.8 V to 2.7 V)
    • JESD8-B (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F Class 3B exceeds 8000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101C exceeds 1000 V
  • Maximum data rates:
    • 500 Mbps (1.8 V to 3.3 V translation)
    • 320 Mbps (< 1.8 V to 3.3 V translation)
    • 320 Mbps (translate to 2.5 V or 1.8 V)
    • 280 Mbps (translate to 1.5 V)
    • 240 Mbps (translate to 1.2 V)
  • Suspend mode
  • Bus hold on data inputs
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10% of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • SOT765-1 and SOT833-1 package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Target applications

Parametrics

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AVCH2T45GSProduction0.8 - 3.60.8 - 3.6CMOS/LVTTL+/- 122.12very low-40~12528011.5149XSON8

Package

Type numberOrderable part number, (Ordering code (12NC))StatusMarkingPackageOutline versionReflow-/Wave solderingPacking
74AVCH2T45GS74AVCH2T45GS,115
( 9352 927 94115 )
ActiveStandard Marking
XSON8
(SOT1203)
SOT1203Reel 7" Q1/T1

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFMSLMSL leadfree
74AVCH2T45GS74AVCH2T45GS,11574AVCH2T45GS11
Quality and reliability disclaimer

Documentation (6)

File nameTitleTypeDate
74AVCH2T45Dual-bit, dual-supply voltage level translator/transceiver; 3-stateData sheet2018-02-20
AN90007Pin FMEA for AVC familyApplication note2018-11-30
Nexperia_document_guide_Logic_translators_201711Nexperia Logic TranslatorsBrochure2017-12-05
avch2t4574AVCH2T45 Ibis modelIBIS model2014-10-14
SOT1203_115Standard product orientation 12NC ending 115Packing2013-07-03
SOT1203plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm bodyOutline drawing2018-11-14

Support

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Models

File nameTitleTypeDate
avch2t4574AVCH2T45 Ibis modelIBIS model2014-10-14

Ordering, pricing & availability

Type numberOrderable part numberOrdering code (12NC)PackingBuy online
74AVCH2T45GS74AVCH2T45GS,115935292794115Reel 7" Q1/T1Order product

Sample

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