74AVCH1T45

Dual-supply voltage level translator/transceiver; 3-state

The 74AVCH1T45 is a single bit, dual supply transceiver that enables bidirectional level translation. It features two 1-bit input-output ports (A and B), a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins A and DIR are referenced to VCC(A) and pin B is referenced to VCC(B). A HIGH on DIR allows transmission from A to B and a LOW on DIR allows transmission from B to A.

The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are in the high-impedance OFF-state.

The 74AVCH1T45 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.

Features

  • Wide supply voltage range:
    • VCC(A): 0.8 V to 3.6 V
    • VCC(B): 0.8 V to 3.6 V
  • High noise immunity
  • Complies with JEDEC standards:
    • JESD8-12 (0.8 V to 1.3 V)
    • JESD8-11 (0.9 V to 1.65 V)
    • JESD8-7 (1.2 V to 1.95 V)
    • JESD8-5 (1.8 V to 2.7 V)
    • JESD8-B (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114E Class 3B exceeds 8000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101C exceeds 1000 V
  • Maximum data rates:
    • 500 Mbit/s (1.8 V to 3.3 V translation)
    • 320 Mbit/s (< 1.8 V to 3.3 V translation)
    • 320 Mbit/s (translate to 2.5 V or 1.8 V)
    • 280 Mbit/s (translate to 1.5 V)
    • 240 Mbit/s (translate to 1.2 V)
  • Suspend mode
  • Bus hold on data inputs
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Parametrics

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)No of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AVCH1T45GMProduction0.8 - 3.60.8 - 3.6CMOS/LVTTL± 122.11very low-40~1252866.3142XSON6
74AVCH1T45GNProduction0.8 - 3.60.8 - 3.6CMOS/LVTTL± 122.11very low-40~1252649.7164XSON6
74AVCH1T45GSProduction0.8 - 3.60.8 - 3.6CMOS/LVTTL± 122.11very low-40~12526212.2170XSON6
74AVCH1T45GWProduction0.8 - 3.60.8 - 3.6CMOS/LVTTL± 122.11very low-40~12526236.1150TSSOP6

Package

Type numberPackageOutline versionReflow-/Wave solderingPackingStatusMarkingOrderable part number, (Ordering code (12NC))
74AVCH1T45GM
XSON6
(SOT886)
SOT886Reel 7" Q1/T1, Q3/T4ActiveStandard Marking74AVCH1T45GM,132
( 9352 841 55132 )
Reel 7" Q1/T1ActiveStandard Marking74AVCH1T45GM,115
( 9352 841 55115 )
74AVCH1T45GN
XSON6
(SOT1115)
SOT1115Reel 7" Q1/T1, Q3/T4ActiveStandard Marking74AVCH1T45GN,132
( 9352 943 62132 )
74AVCH1T45GS
XSON6
(SOT1202)
SOT1202Reel 7" Q1/T1, Q3/T4ActiveStandard Marking74AVCH1T45GS,132
( 9352 943 63132 )
74AVCH1T45GW
TSSOP6
(SOT363)
SOT363Reel 7" Q3/T4, ReverseActiveStandard Marking74AVCH1T45GW,125
( 9352 841 56125 )

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateMSLMSL leadfree
74AVCH1T45GM74AVCH1T45GM,13274AVCH1T45GMAlways Pb-free11
74AVCH1T45GM74AVCH1T45GM,11574AVCH1T45GMAlways Pb-free11
74AVCH1T45GN74AVCH1T45GN,13274AVCH1T45GNAlways Pb-free11
74AVCH1T45GS74AVCH1T45GS,13274AVCH1T45GSAlways Pb-free11
74AVCH1T45GW74AVCH1T45GW,12574AVCH1T45GWAlways Pb-free11
Quality and reliability disclaimer

Documentation (21)

File nameTitleTypeDate
74AVCH1T45Dual-supply voltage level translator/transceiver; 3-stateData sheet2017-03-16
AN10161PicoGate Logic footprintsApplication note2002-10-29
Nexperia_document_guide_Logic_translators_201711Nexperia Logic TranslatorsBrochure2017-12-05
avch1t4574AVCH1T45 Ibis modelIBIS model2014-10-14
nexperia_selection_guide_2019_201901Selection guide 2019. Discretes, Logic and MOSFETsSelection guide2018-12-12
MAR_SOT1202MAR_SOT1202 TopmarkTop marking2013-06-03
SOT1202_132Reversed product orientation 12NC ending 132Packing2013-04-04
SOT1202plastic, leadless extremely thin small outline package; 6 terminals; 0.35 mm pitch; 1 mm x 1mm x 0.35 mm bodyOutline drawing2018-11-14
MAR_SOT1115MAR_SOT1115 TopmarkTop marking2013-06-03
SOT1115_132Reversed product orientation 12NC ending 132Packing2013-04-04
SOT1115plastic, leadless extremely thin small outline package; 6 terminals; 0.3 mm pitch; 0.9 mm x 1 mm x 0.35 mm bodyOutline drawing2018-11-14
SOT363_165TSSOP6; reel pack; reversed product orientation; 12NC ending 165Packing2012-11-20
SOT363_125Tape reel SMD; reversed product orientation 12NC ending 125Packing2012-11-20
SOT363_135TSSOP6; Tape reel SMD; standard product orientation 12NC ending 135Packing2012-11-20
MAR_SOT363MAR_SOT363 TopmarkTop marking2013-06-03
SOT363_115TSSOP6; Tape reel SMD; standard product orientation 12NC ending 115Packing2012-11-15
SOT363plastic, surface-mounted package; 6 leads; 0.65 mm pitch; 2.1 mm x 1.25 mm x 0.95 mm bodyOutline drawing2018-11-14
SOT886_115XSON6; Reel pack; SMD, 7" Q1/T1 Standard product orientation Orderable part number ending ,115 or X Ordering code (12NC) ending 115Packing2013-04-23
MAR_SOT886MAR_SOT886 TopmarkTop marking2013-06-03
SOT886_132XSON6; reel pack; standard product orientation; 12NC ending 132Packing2012-11-28
SOT886plastic, leadless extremely thin small outline package; 6 terminals; 0.5 mm pitch; 1 mm x 1.45 mm x 0.5 mm bodyOutline drawing2018-11-14

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Models

File nameTitleTypeDate
avch1t4574AVCH1T45 Ibis modelIBIS model2014-10-14

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