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74LVC16373A-Q100; 74LVCH16373A-Q100

16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

The 74LVC16373A-Q100 and 74LVCH16373A-Q100 are 16-bit D-type transparent latches with 3-state outputs. The devices can be used as two 8-bit transparent latches or a single 16-bit transparent latch. The devices feature two latch enables (1LE and 2LE) and two output enables (1OE and 2OE), each controlling 8-bits. When nLE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When nLE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of nLE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the latches. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Bus hold on the data inputs eliminates the need for external pull-up resistors to hold unused inputs.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Overvoltage tolerant inputs to 5.5 V
  • Wide supply voltage range from 1.2 V to 3.6 V
  • CMOS low power dissipation
  • MULTIBYTE flow-through standard pinout architecture
  • Multiple low inductance supply pins for minimum noise and ground bounce
  • Direct interface with TTL levels
  • All data inputs have bus hold (74LVCH16373A-Q100 only)
  • IOFF circuitry provides partial Power-down mode operation
  • Complies with JEDEC standards:
    • JESD8-7A (1.65 V to 1.95 V)
    • JESD8-5A (2.3 V to 2.7 V)
    • JESD8-C/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • MIL-STD-883, method 3015 exceeds 2000 V
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
    • CDM ANSI/ESDA/Jedec JS-002 exceeds 1000 V

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC16373ADGG-Q100Production1.2 - 3.6TTL± 243low-40~125822.037TSSOP48
74LVC16373ADGV-Q100Production1.2 - 3.6TTL± 243low-40~125822.037TVSOP48
74LVCH16373ADGG-Q100Production1.2 - 3.6TTL± 243low-40~125822.037TSSOP48
74LVCH16373ADGV-Q100Production1.2 - 3.6TTL± 243low-40~125822.037TVSOP48

Package

Type numberPackagePackage informationReflow-/Wave solderingPackingStatusMarkingOrderable part number, (Ordering code (12NC))
74LVC16373ADGG-Q100
TSSOP48
(SOT362-1)
SOT362-1SSOP-TSSOP-VSO-WAVE
Reel 13" Q1/T1ActiveLVC16373A74LVC16373ADGG-Q1J
( 9353 044 94118 )
74LVC16373ADGV-Q100
TVSOP48
(SOT480-1)
SOT480-1Reel 13" Q1/T1Active74LVC16373A74LVC16373ADGV-Q1J
( 9356 907 93118 )
74LVCH16373ADGG-Q100
TSSOP48
(SOT362-1)
SOT362-1SSOP-TSSOP-VSO-WAVE
Reel 13" Q1/T1ActiveLVCH16373A74LVCH16373ADGG-QJ
( 9353 048 72118 )
74LVCH16373ADGV-Q100
TVSOP48
(SOT480-1)
SOT480-1Reel 13" Q1/T1ActiveStandard Marking74LVCH16373ADGV-QJ
( 9356 907 99118 )

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateEFRIFRMTBF (hour)MSLMSL leadfree
74LVC16373ADGG-Q10074LVC16373ADGG-Q1J74LVC16373ADGG-Q100Always Pb-free19.30.52E911
74LVC16373ADGV-Q10074LVC16373ADGV-Q1J74LVC16373ADGV-Q100week 25, 201919.30.52E911
74LVCH16373ADGG-Q10074LVCH16373ADGG-QJ74LVCH16373ADGG-Q100Always Pb-free19.30.52E911
74LVCH16373ADGV-Q10074LVCH16373ADGV-QJ74LVCH16373ADGV-Q100week 25, 201919.30.52E911
Quality and reliability disclaimer

Documentation (7)

File nameTitleTypeDate
74LVC_LVCH16373A_Q10016-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-stateData sheet2021-10-01
AN11009Pin FMEA for LVC familyApplication note2019-01-09
lvc16373a74LVC16373A IBIS modelIBIS model2013-04-08
lvch16373alvch16373a IBIS modelIBIS model2013-04-07
SOT480-1plastic, thin shrink small outline package; 48 leads; 0.4 mm pitch; 9.7 mm x 4.4 mm x 1.1 mm bodyPackage information2020-04-21
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT362-1plastic, thin shrink small outline package; 48 leads; 0.5 mm pitch; 12.8 mm x 6.1 mm x 1.2 mm bodyPackage information2020-04-21

Support

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Models

File nameTitleTypeDate
lvc16373a74LVC16373A IBIS modelIBIS model2013-04-08
lvch16373alvch16373a IBIS modelIBIS model2013-04-07

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