74LVC1G74GS

Single D-type flip-flop with set and reset; positive edge trigger

The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D) inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q outputs.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing damaging backflow current through the device when it is powered down.

The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.

Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times.

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74LVC1G74GS 74LVC1G74GS,115 935292795115 SOT1203 Order product

Features

  • Wide supply voltage range from 1.65 V to 5.5 V
  • 5 V tolerant inputs for interfacing with 5 V logic
  • High noise immunity
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8-B/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power consumption
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • Inputs accept voltages up to 5 V
  • Multiple package options
  • Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃

Target applications

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC1G74GSProduction1.65 - 5.5CMOS/LVTTL± 323.5280low-40~12528412.3152XSON8

Package

Type numberOrderable part number, (Ordering code (12NC))StatusMarkingPackageOutline versionReflow-/Wave solderingPacking
74LVC1G74GS74LVC1G74GS,115
( 9352 927 95115 )
ActiveY4
XSON8
(SOT1203)
SOT1203Reel 7" Q1/T1

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFEFRIFRMTBF (hour)MSLMSL leadfree
74LVC1G74GS74LVC1G74GS,11574LVC1G74GS123.83.872.58E811
Quality and reliability disclaimer

Documentation (6)

File nameTitleTypeDate
74LVC1G74Single D-type flip-flop with set and reset; positive edge triggerData sheet2018-12-27
AN10343MicroPak soldering informationApplication note2010-12-30
AN11009Pin FMEA for LVC familyApplication note2019-01-09
lvc1g7474LVC1G74 IBIS modelIBIS model2014-10-20
SOT1203_115Standard product orientation 12NC ending 115Packing2013-07-03
SOT1203plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm bodyOutline drawing2018-11-14

Support

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Models

File nameTitleTypeDate
lvc1g7474LVC1G74 IBIS modelIBIS model2014-10-20

Ordering, pricing & availability

Type numberOrderable part numberOrdering code (12NC)PackingBuy online
74LVC1G74GS74LVC1G74GS,115935292795115Reel 7" Q1/T1Order product

Sample

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Sample orders normally take 2-4 days for delivery.

If you do not have a direct account with Nexperia our network of global and regional distributors is available and equipped to support you with Nexperia samples.