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74AUP1G79

Low-power D-type flip-flop; positive-edge trigger

The 74AUP1G79 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output.. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 0.8 V to 3.6 V
  • CMOS low power dissipation
  • High noise immunity
  • Complies with JEDEC standards:
    • JESD8-12 (0.8 V to 1.3 V)
    • JESD8-11 (0.9 V to 1.65 V)
    • JESD8-7 (1.2 V to 1.95 V)
    • JESD8-5 (1.8 V to 2.7 V)
    • JESD8-C (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F Class 3A exceeds 5000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Overvoltage tolerant inputs to 3.6 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AUP1G79GMProduction0.8 - 3.6CMOS± 1.99.1400ultra low-40~1253117.7157XSON6
74AUP1G79GNProduction0.8 - 3.6CMOS± 1.99.1400ultra low-40~12533422.6207XSON6
74AUP1G79GSProduction0.8 - 3.6CMOS± 1.99.1400ultra low-40~12532128.7215XSON6
74AUP1G79GVProduction0.8 - 3.6CMOS± 1.99.1400ultra low-40~12526862.1167TSOP5
74AUP1G79GWProduction0.8 - 3.6CMOS± 1.99.1400ultra low-40~12530979.2179TSSOP5
74AUP1G79GXProduction0.8 - 3.6CMOS± 1.99.1400ultra low-40~12532290.7191X2SON5

Package

Type numberPackagePackage informationReflow-/Wave solderingPackingStatusMarkingOrderable part number, (Ordering code (12NC))
74AUP1G79GM
XSON6
(SOT886)
SOT886Reel 7" Q1/T1, Q3/T4ActivepP74AUP1G79GM,132
( 9352 790 47132 )
Reel 7” Q1/T1 or Q2/T3ActivepP74AUP1G79GM,115
( 9352 790 47115 )
74AUP1G79GN
XSON6
(SOT1115)
SOT1115Reel 7" Q1/T1, Q3/T4ActivepP74AUP1G79GN,132
( 9352 917 45132 )
74AUP1G79GS
XSON6
(SOT1202)
SOT1202Reel 7" Q1/T1, Q3/T4ActivepP74AUP1G79GS,132
( 9352 928 69132 )
74AUP1G79GV
TSOP5
(SOT753)
SOT753Reel 7" Q3/T4, ReverseActivep7974AUP1G79GV,125
( 9352 900 77125 )
74AUP1G79GW
TSSOP5
(SOT353-1)
SOT353-1WAVE_BG-BD-1
Reel 7" Q3/T4, ReverseActivepP74AUP1G79GW,125
( 9352 790 46125 )
74AUP1G79GX
X2SON5
(SOT1226-3)
SOT1226-3Reel 7" Q3/T4, ReverseActivepP74AUP1G79GX,125
( 9352 983 65125 )

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateEFRIFRMTBF (hour)MSLMSL leadfree
74AUP1G79GM74AUP1G79GM,13274AUP1G79GMAlways Pb-free32.60.91.11E911
74AUP1G79GM74AUP1G79GM,11574AUP1G79GMAlways Pb-free32.60.91.11E911
74AUP1G79GN74AUP1G79GN,13274AUP1G79GNAlways Pb-free32.60.91.11E911
74AUP1G79GS74AUP1G79GS,13274AUP1G79GSAlways Pb-free32.60.91.11E911
74AUP1G79GV74AUP1G79GV,12574AUP1G79GVAlways Pb-free32.60.91.11E911
74AUP1G79GW74AUP1G79GW,12574AUP1G79GWAlways Pb-free32.60.91.11E911
74AUP1G79GX74AUP1G79GX,12574AUP1G79GXAlways Pb-free32.60.91.11E911
Quality and reliability disclaimer

Documentation (19)

File nameTitleTypeDate
74AUP1G79Low-power D-type flip-flop; positive-edge triggerData sheet2021-07-20
AN10161PicoGate Logic footprintsApplication note2002-10-29
AN11052Pin FMEA for AUP familyApplication note2019-01-09
aup1g7974AUP1G79 IBIS modelIBIS model2014-12-14
Nexperia_document_leaflet_Logic_X2SON_packages_062018X2SON ultra-small 4, 5, 6 & 8-pin leadless packagesLeaflet2018-06-05
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904Leaflet2019-04-12
Nexperia_Selection_guide_2020Nexperia Selection Guide 2020Selection guide2020-01-31
Nexperia_Selection_guide_2021Nexperia Selection Guide 2021Selection guide2021-01-08
SOT1202plastic, leadless extremely thin small outline package; 6 terminals; 0.35 mm pitch; 1 mm x 1mm x 0.35 mm bodyPackage information2020-04-21
MAR_SOT1202MAR_SOT1202 TopmarkTop marking2013-06-03
SOT353-1plastic, thin shrink small outline package; 5 leads; 0.65 mm pitch; 2 mm x 1.25 mm x 0.95 mm bodyPackage information2020-04-21
WAVE_BG-BD-1Wave soldering profileWave soldering2021-09-08
SOT1115plastic, leadless extremely thin small outline package; 6 terminals; 0.3 mm pitch; 0.9 mm x 1 mm x 0.35 mm bodyPackage information2021-07-12
MAR_SOT1115MAR_SOT1115 TopmarkTop marking2013-06-03
SOT886plastic, leadless extremely thin small outline package; 6 terminals; 0.5 mm pitch; 1 mm x 1.45 mm x 0.5 mm bodyPackage information2020-04-21
MAR_SOT886MAR_SOT886 TopmarkTop marking2013-06-03
SOT1226-3plastic thermal enhanced extremely thin small outline package; no leads;5 terminals; body 0.8 x 0.8 x 0.32 mmPackage information2020-08-27
SOT753plastic, surface-mounted package; 5 leads; 0.95 mm pitch; 2.9 mm x 1.5 mm x 1 mm bodyPackage information2020-04-21
MAR_SOT753MAR_SOT753 TopmarkTop marking2013-06-03

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Models

File nameTitleTypeDate
aup1g7974AUP1G79 IBIS modelIBIS model2014-12-14

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