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74HC109PW

Dual JK flip-flop with set and reset; positive-edge-trigger

The 74HC109; 74HCT109 is a dual positive edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) inputs, set (SD) and reset (RD) inputs and complementary Q and Q outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table. The J and K inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. The JK design allows operation as a D-type flip-flop by connecting the J and K inputs together. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74HC109PW 74HC109PWJ 935691205118 SOT403-1 Order product

Features and benefits

  • J and K inputs for easy D-type flip-flop
  • Toggle flip-flop or "do nothing" mode
  • Wide supply voltage range:
    • For 74HC109: from 2.0 V to 6.0 V
    • For 74HCT109: from 4.5 V to 5.5 V
  • CMOS low power dissipation
  • High noise immunity
  • Input levels:
    • For 74HC109: CMOS level
    • For 74HCT109: TTL level
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • 74HC109 complies with JEDEC standards:
    • JESD8C (2.7 V to 3.6 V)
    • JESD7A (2.0 V to 6.0 V)
  • 74HCT109 complies with JEDEC standard JESD7A (2.0 V to 6.0 V)
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Applications

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74HC109PWProduction2.0 - 6.0CMOS± 5.21575low-40~1251193.248.1TSSOP16

Package

Type numberOrderable part number, (Ordering code (12NC))StatusMarkingPackagePackage informationReflow-/Wave solderingPacking
74HC109PW74HC109PWJ
( 9356 912 05118 )
Active74HC109
TSSOP16
(SOT403-1)
SOT403-1SSOP-TSSOP-VSO-WAVE
Reel 13" Q1/T1

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFEFRIFRMTBF (hour)MSLMSL leadfree
74HC109PW74HC109PWJ74HC109PW39.31.37.69E811
Quality and reliability disclaimer

Documentation (4)

File nameTitleTypeDate
74HC_HCT109Dual JK flip-flop with set and reset; positive-edge-triggerData sheet2021-08-05
AN11044Pin FMEA 74HC/74HCT familyApplication note2019-01-09
HCT_USER_GUIDEHC/T User GuideUser manual1997-10-31
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08

Support

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Ordering, pricing & availability

Type numberOrderable part numberOrdering code (12NC)PackingBuy online
74HC109PW74HC109PWJ935691205118Reel 13" Q1/T1Order product

Sample

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Sample orders normally take 2-4 days for delivery.

If you do not have a direct account with Nexperia our network of global and regional distributors is available and equipped to support you with Nexperia samples.