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74ALVCH16543DGG

16-bit D-type registered transceiver; 3-state

The 74ALVCH16543 is a dual octal registered transceiver. Each section contains two sets of D-type latches for temporary storage of the data flow in either direction.

Separate latch enable (nLEAB, nLEBA) and output enable (nOEAB, nOEBA) inputs are provided for each register to permit independent control in either direction of the data flow.

The 74ALVCH16543 contains two sections each consisting of two sets of eight D-type latches with separate inputs and controls for each set. For data flow from A to B, for example, the A-to-B enable (nEAB) inputs must be LOW in order to enter data from nA0 to nA7, or take data from nB0 to nB7, as indicated in the function table. With nEAB LOW, a LOW signal on the A-to-B latch enable (nLEAB) input makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the nLEAB signal stores the A data into the latches. With nEAB and nOEAB both LOW, the 3-state B output buffers are active and display the data present at the output of the A latches. Similarly, the nEBA, nLEBA and nOEBA signals control the data flow from B-to-A.

Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74ALVCH16543DGG 74ALVCH16543DGGS 935262544512 SOT364-1 Order product
74ALVCH16543DGG 74ALVCH16543DGGY 935262544518 SOT364-1 Order product

Features and benefits

  • CMOS low power consumption
  • Direct interface with TTL levels
  • MULTIBYTE flow-through standard pin-out architecture
  • Back-to-back registers for storage
  • Output drive capability 50 Ω transmission lines at 85 °C
  • All data inputs have bus hold
  • Low inductance multiple VCC and GND pins for minimize noise and ground bounce
  • Current drive ±24 mA at 3.0 V
  • 3-state non-inverting outputs for bus oriented applications
  • Complies with JEDEC standards:
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8B/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • HBM ANSI/ESDA/JEDEC JS-001 exceeds 2000 V
    • CDM JESD22-C101E exceeds 1000 V

Applications

Parametrics

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capabilitytpd (ns)No of bitsfmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Package name
74ALVCH16543DGGProduction1.65 - 3.6n.a.TTL+/- 243.816150low-40~859321.0TSSOP56

Package

Type numberOrderable part number, (Ordering code (12NC))StatusMarkingPackagePackage informationReflow-/Wave solderingPacking
74ALVCH16543DGG74ALVCH16543DGGS
( 9352 625 44512 )
ActiveALVCH16543
TSSOP56
(SOT364-1)
SOT364-1SSOP-TSSOP-VSO-WAVE
Tube in Drypack
74ALVCH16543DGGY
( 9352 625 44518 )
ActiveALVCH16543Reel 13" Q1/T1 in Drypack

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFEFRIFRMTBF (hour)MSLMSL leadfree
74ALVCH16543DGG74ALVCH16543DGGS74ALVCH16543DGG123.83.872.58E822
74ALVCH16543DGG74ALVCH16543DGGY74ALVCH16543DGG123.83.872.58E822
Quality and reliability disclaimer

Documentation (3)

File nameTitleTypeDate
74ALVCH1654316-bit D-type registered transceiver; 3-stateData sheet2017-12-15
alvch16543alvch16543 IBIS modelIBIS model2013-04-07
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08

Support

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Models

File nameTitleTypeDate
alvch16543alvch16543 IBIS modelIBIS model2013-04-07

Ordering, pricing & availability

Type numberOrderable part numberOrdering code (12NC)PackingBuy online
74ALVCH16543DGG74ALVCH16543DGGS935262544512Tube in DrypackOrder product
74ALVCH16543DGG74ALVCH16543DGGY935262544518Reel 13" Q1/T1 in DrypackOrder product

Sample

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