Bipolar transistors

Diodes

ESD protection, TVS, filtering and signal conditioning

MOSFETs

SiC MOSFETs

GaN FETs

IGBTs

Analog & Logic ICs

Automotive qualified products (AEC-Q100/Q101)

X2SON packages

Nexperia has developed X2SON leadless packages to provide the smallest footprint for logic functions while ensuring pad pitch remains 0.4 mm or over, making step-down masks unnecessary. Our X2SON packages feature 4, 5, 6 or 8 pins and are available in low-power AUP, AXP, LV & LVC technology families, covering over one hundred logic functions. In 2018, Nexperia introduced X2SON4, this 4-pin package option further reduces footprint by 44% compared to the 5-pin X2SON5.

Size reduction X2SON4 compared to X2SON5

image

X2SON packages are MicroPak packages also known under package suffix GX for X2SON8, X2SON6 and X2SON5 or GX4 for X2SON4. X2SON packages’ tininess saves valuable board real estate and drive the miniaturization trend. Single, dual and triple gates are available as well as single translators.

Key features and benefits

  • Smaller footprint than GF and GN packages options
  • High contact area-to-chip ratio and enhanced durability
  • Lower PCB costs, easier placement and miniaturization
  • ≥ 0.4 mm lead pitch for ease of assembly
  • Low profile height (0.35mm) and low width (0.8mm)
  • RoHS & dark-green compliant with NiPdAu leadframe finish

Key applications

  • Space constrained applications
  • Mobile devices
  • Portable computing
  • IoT & wearables
  • Consumer electronics

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X2SON packages
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Products

Analog & Logic ICs

Type number Description Status Quick access
74AUP1G00GX Low-power 2-input NAND gate Production
74AUP1G02GX Low-power 2-input NOR gate Production
74AUP1G04GX Low-power inverter Production
74AUP1G04GX4 Low-power inverter Production
74AUP1G06GX Low-power inverter with open-drain output Production
74AUP1G07GX Low-power buffer with open-drain output Production
74AUP1G07GX4 Low-power buffer with open-drain output Production
74AUP1G08GX Low-power 2-input AND gate Production
74AUP1G09GX Low-power 2-input AND gate with open-drain Production
74AUP1G125GX Low-power buffer/line driver; 3-state Production
74AUP1G126GX Low-power buffer/line driver; 3-state Production
74AUP1G132GX Low-power 2-input NAND Schmitt trigger Production
74AUP1G14GX Low-power Schmitt trigger inverter Production
74AUP1G14GX4 Low-power Schmitt trigger inverter Production
74AUP1G14GX4-Q100 Low-power Schmitt trigger inverter Production
74AUP1G157GX Low-power 2-input multiplexer Production
74AUP1G17GX Low-power Schmitt trigger Production
74AUP1G17GX4 Low-power Schmitt trigger Production
74AUP1G240GX Low-power inverting buffer/line driver; 3-state Production
74AUP1G32GX Low-power 2-input OR-gate Production
74AUP1G3208GX Low-power 3-input OR-AND gate Production
74AUP1G34GX Low-power buffer Production
74AUP1G34GX4 Low-power buffer Production
74AUP1G38GX Low-power 2-input NAND gate (open drain) Production
74AUP1G57GX Low-power configurable multiple function gate Production
74AUP1G58GX Low-power configurable multiple function gate Production
74AUP1G74GX Low-power D-type flip-flop with set and reset; positive-edge trigger Production
74AUP1G79GX Low-power D-type flip-flop; positive-edge trigger Production
74AUP1G80GX Low-power D-type flip-flop; positive-edge trigger Production
74AUP1G86GX Low-power 2-input EXCLUSIVE-OR gate Production
74AUP1G97GX Low-power configurable multiple function gate Production
74AUP1G98GX Low-power configurable multiple function gate Production
74AUP1GU04GX Low-power unbuffered inverter Production
74AUP2G00GX Low-power dual 2-input NAND gate Production
74AUP2G04GX Low-power dual inverter Production
74AUP2G07GX Low-power dual buffer with open-drain output Production
74AUP2G08GX Low-power dual 2-input AND gate Production
74AUP2G125GX Low-power dual buffer/line driver; 3-state Production
74AUP2G126GX Low-power dual buffer/line driver; 3-state Production
74AUP2G132GX Low-power dual 2-input NAND Schmitt trigger Production
74AUP2G14GX Low-power dual Schmitt trigger inverter Production
74AUP2G32GX Low-power dual 2-input OR gate Production
74AUP2G34GX Low-power dual buffer Production
74AUP3G34GX Low-power triple buffer Production
74AXP1G08GX Low-power 2-input AND gate Not for design in
74AXP1G125GX Low-power buffer/line driver; 3-state Not for design in
74LVC1G00GX Single 2-input NAND gate Production
74LVC1G02GX Single 2-input NOR gate Production
74LVC1G04GX Single inverter Production
74LVC1G04GX4 Single inverter Production
74LVC1G06GX Inverter with open-drain output Production
74LVC1G07GX Buffer with open-drain output Production
74LVC1G07GX4 Buffer with open-drain output Production
74LVC1G08GX Single 2-input AND gate Production
74LVC1G11GX Single 3-input AND gate Production
74LVC1G125GX Bus buffer/line driver; 3-state Production
74LVC1G126GX Bus buffer/line driver; 3-state Production
74LVC1G14GX Single Schmitt-trigger inverter Production
74LVC1G14GX4 Single Schmitt-trigger inverter Production
74LVC1G14GX4-Q100 Single Schmitt trigger inverter Production
74LVC1G17GX Single Schmitt trigger buffer Production
74LVC1G17GX4 Single Schmitt trigger buffer Production
74LVC1G240GX Single inverting buffer/line driver; 3-state Production
74LVC1G32GX Single 2-input OR gate Production
74LVC1G332GX Single 3-input OR gate Production
74LVC1G34GX Single buffer Production
74LVC1G34GX4 Single buffer Production
74LVC1G38GX 2-input NAND gate; open drain Production
74LVC1G79GX Single D-type flip-flop; positive-edge trigger Production
74LVC1G80GX Single D-type flip-flop; positive-edge trigger Production
74LVC1G86GX 2-input EXCLUSIVE-OR gate Production
74LVC1G97GX Low-power configurable multiple function gate Production
74LVC1GU04GX Unbuffered inverter Production
74LVC2G00GX Dual 2-input NAND gate Production
74LVC2G04GX Dual inverter Production
74LVC2G06GX Inverters with open-drain outputs Production
74LVC2G07GX Buffers with open-drain outputs Production
74LVC2G08GX Dual 2-input AND gate Production
74LVC2G32GX Dual 2-input OR gate Production
74LVC2G34GX Dual buffer gate Production
74LVC2G38GX Dual 2-input NAND gate; open drain Production
74LVC2G86GX Dual 2-input EXCLUSIVE-OR gate Production

Automotive qualified products (AEC-Q100/Q101)

Type number Description Status Quick access
74AUP1G14GX4-Q100 Low-power Schmitt trigger inverter Production
74LVC1G14GX4-Q100 Single Schmitt trigger inverter Production

Documentation

File name Title Type Date
X2SON5_SOT1226_mk plastic, thermal enhanced extremely thin small outline package; no leads; 5 terminals; 0.48 mm pitch; 0.8 mm x 0.8 mm x 0.35 mm body Marcom graphics 2017-01-28
Nexperia_document_QIC_Logic_Packages_Recommendations_201711 Longevity – Packages by pin count Leaflet 2017-11-27
Nexperia_document_leaflet_Logic_X2SON_packages_062018 X2SON ultra-small 4, 5, 6 & 8-pin leadless packages Leaflet 2018-06-05
Nexperia_package_poster Nexperia package poster Leaflet 2019-03-01
Nexperia_Selection_guide_2023 Nexperia Selection Guide 2023 Selection guide 2023-05-10

If you have a support question, let us know. If you are in need of design support, let us know and fill in the answer form, well get back to you shortly.

Or contact us for further support.

Datasheets (72)

File name Title Type Date
74AUP1G00 Low-power 2-input NAND gate Data sheet 2023-07-11
74AUP1G02 Low-power 2-input NOR gate Data sheet 2023-07-11
74AUP1G04 Low-power inverter Data sheet 2023-07-11
74AUP1G06 Low-power inverter with open-drain output Data sheet 2023-07-11
74AUP1G07 Low-power buffer with open-drain output Data sheet 2023-07-11
74AUP1G08 Low-power 2-input AND gate Data sheet 2023-07-12
74AUP1G09 Low-power 2-input AND gate with open-drain Data sheet 2023-07-11
74AUP1G125 Low-power buffer/line driver; 3-state Data sheet 2023-07-11
74AUP1G126 Low-power buffer/line driver; 3-state Data sheet 2023-07-14
74AUP1G132 Low-power 2-input NAND Schmitt trigger Data sheet 2023-07-11
74AUP1G14 Low-power Schmitt trigger inverter Data sheet 2023-07-12
74AUP1G14_Q100 Low-power Schmitt trigger inverter Data sheet 2023-10-27
74AUP1G157 Low-power 2-input multiplexer Data sheet 2023-07-12
74AUP1G17 Low-power Schmitt trigger Data sheet 2023-07-18
74AUP1G240 Low-power inverting buffer/line driver; 3-state Data sheet 2023-07-18
74AUP1G32 Low-power 2-input OR-gate Data sheet 2023-07-13
74AUP1G3208 Low-power 3-input OR-AND gate Data sheet 2023-07-18
74AUP1G34 Low-power buffer Data sheet 2023-07-13
74AUP1G38 Low-power 2-input NAND gate (open drain) Data sheet 2023-07-18
74AUP1G57 Low-power configurable multiple function gate Data sheet 2023-07-24
74AUP1G58 Low-power configurable multiple function gate Data sheet 2023-07-24
74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger Data sheet 2023-07-14
74AUP1G79 Low-power D-type flip-flop; positive-edge trigger Data sheet 2023-07-24
74AUP1G80 Low-power D-type flip-flop; positive-edge trigger Data sheet 2023-07-24
74AUP1G86 Low-power 2-input EXCLUSIVE-OR gate Data sheet 2023-07-14
74AUP1G97 Low-power configurable multiple function gate Data sheet 2023-07-24
74AUP1G98 Low-power configurable multiple function gate Data sheet 2023-07-24
74AUP1GU04 Low-power unbuffered inverter Data sheet 2023-07-28
74AUP2G00 Low-power dual 2-input NAND gate Data sheet 2024-05-29
74AUP2G04 Low-power dual inverter Data sheet 2023-07-19
74AUP2G07 Low-power dual buffer with open-drain output Data sheet 2023-07-26
74AUP2G08 Low-power dual 2-input AND gate Data sheet 2023-07-19
74AUP2G125 Low-power dual buffer/line driver; 3-state Data sheet 2023-07-26
74AUP2G126 Low-power dual buffer/line driver; 3-state Data sheet 2024-05-06
74AUP2G132 Low-power dual 2-input NAND Schmitt trigger Data sheet 2023-07-26
74AUP2G14 Low-power dual Schmitt trigger inverter Data sheet 2023-07-26
74AUP2G32 Low-power dual 2-input OR gate Data sheet 2023-07-27
74AUP2G34 Low-power dual buffer Data sheet 2023-07-27
74AUP3G34 Low-power triple buffer Data sheet 2024-04-29
74AXP1G08 Low-power 2-input AND gate Data sheet 2021-11-03
74AXP1G125 Low-power buffer/line driver; 3-state Data sheet 2021-09-30
74LVC1G00 Single 2-input NAND gate Data sheet 2023-08-04
74LVC1G02 Single 2-input NOR gate Data sheet 2023-08-04
74LVC1G04 Single inverter Data sheet 2023-08-04
74LVC1G06 Inverter with open-drain output Data sheet 2023-08-04
74LVC1G07 Buffer with open-drain output Data sheet 2023-08-07
74LVC1G08 Single 2-input AND gate Data sheet 2023-08-04
74LVC1G11 Single 3-input AND gate Data sheet 2023-08-15
74LVC1G125 Bus buffer/line driver; 3-state Data sheet 2023-08-23
74LVC1G126 Bus buffer/line driver; 3-state Data sheet 2023-08-14
74LVC1G14 Single Schmitt-trigger inverter Data sheet 2023-08-15
74LVC1G14_Q100 Single Schmitt trigger inverter Data sheet 2023-08-15
74LVC1G17 Single Schmitt trigger buffer Data sheet 2023-08-15
74LVC1G240 Single inverting buffer/line driver; 3-state Data sheet 2023-11-01
74LVC1G32 Single 2-input OR gate Data sheet 2023-08-18
74LVC1G332 Single 3-input OR gate Data sheet 2023-08-18
74LVC1G34 Single buffer Data sheet 2023-08-18
74LVC1G38 2-input NAND gate; open drain Data sheet 2023-08-18
74LVC1G79 Single D-type flip-flop; positive-edge trigger Data sheet 2023-08-18
74LVC1G80 Single D-type flip-flop; positive-edge trigger Data sheet 2023-08-18
74LVC1G86 2-input EXCLUSIVE-OR gate Data sheet 2023-08-22
74LVC1G97 Low-power configurable multiple function gate Data sheet 2023-08-28
74LVC1GU04 Unbuffered inverter Data sheet 2023-09-07
74LVC2G00 Dual 2-input NAND gate Data sheet 2024-05-08
74LVC2G04 Dual inverter Data sheet 2023-08-15
74LVC2G06 Inverters with open-drain outputs Data sheet 2023-08-15
74LVC2G07 Buffers with open-drain outputs Data sheet 2023-08-28
74LVC2G08 Dual 2-input AND gate Data sheet 2023-08-16
74LVC2G32 Dual 2-input OR gate Data sheet 2023-08-22
74LVC2G34 Dual buffer gate Data sheet 2023-08-22
74LVC2G38 Dual 2-input NAND gate; open drain Data sheet 2024-04-30
74LVC2G86 Dual 2-input EXCLUSIVE-OR gate Data sheet 2024-04-26