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74AHC377D

Octal D-type flip-flop with data enable; positive-edge trigger

The 74AHC377; 74AHCT377 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.

The 74AHC377; 74AHCT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. A common clock input (CP) loads all flip-flops simultaneously when the data enable input (E) is LOW. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. The E input is only required to be stable one set-up time prior to the LOW-to-HIGH transition for predictable operation.

For versions associated with the 74AHC377; 74AHCT377, refer to the following:

  • For the master reset version, see 74AHC273; 74AHCT273
  • For the transparent latch version, see 74AHC373; 74AHCT373
  • For the 3-state version, see 74AHC374; 74AHCT374

Alternatives

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors

Features and benefits

  • Balanced propagation delays
  • All inputs have Schmitt-trigger actions
  • Inputs accept voltages higher than VCC
  • Ideal for addressable register applications
  • Data enable for address and data synchronization
  • Eight positive-edge triggered D-type flip-flops
  • Input levels:
    • For 74AHC377: CMOS level
    • For 74AHCT377: TTL level
  • ESD protection:
    • HBM EIA/JESD22-A114E exceeds 2000 V
    • MM EIA/JESD22-A115-A exceeds 200 V
    • CDM EIA/JESD22-C101C exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AHC377DEnd of life2.0 - 5.5CMOS± 83.9175low-40~1258527.461SO20

PCB Symbol, Footprint and 3D Model

Model NameDescription

Series

Documentation (5)

File nameTitleTypeDate
74AHC_AHCT377Octal D-type flip-flop with data enable; positive-edge triggerData sheet2017-07-20
AN11106Pin FMEA for AHC/AHCT familyApplication note2019-01-09
ahc377ahc377 IBIS modelIBIS model2013-04-07
SOT163-1_118SO20; Reel pack for SMD, 13"; Q1/T1 product orientationPacking information2022-08-01
WAVE_BG-BD-1Wave soldering profileWave soldering2021-09-08

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Models

File nameTitleTypeDate
ahc377ahc377 IBIS modelIBIS model2013-04-07

PCB Symbol, Footprint and 3D Model

Model NameDescription

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Interactive datasheet