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74LVC1G175GM

Single D-type flip-flop with reset; positive-edge trigger

The 74LVC1G175 is a low-power, low-voltage single positive edge triggered D-type flip-flop with individual data (D) input, clock (CP) input, master reset (MR) input, and Q output.

The master reset (MR) is an asynchronous active LOW input and operates independently of the clock input. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D input must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.

The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times.

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74LVC1G175GM 74LVC1G175GM,132 935277208132 SOT886 Order product
74LVC1G175GM 74LVC1G175GM,115 935277208115 SOT886 Order product

Features and benefits

  • Wide supply voltage range from 1.65 V to 5.5 V
  • 5 V tolerant inputs for interfacing with 5 V logic
  • High noise immunity
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8B/JESD36 (2.7 V to 3.6 V).
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V.
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power consumption
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • Inputs accept voltages up to 5 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C.

Applications

Parametrics

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC1G175GMProduction1.65 - 5.5CMOS/LVTTL± 323.1300low-40~1252916.6145XSON6

Package

Type numberOrderable part number, (Ordering code (12NC))StatusMarkingPackagePackage informationReflow-/Wave solderingPacking
74LVC1G175GM74LVC1G175GM,132
( 9352 772 08132 )
ActiveYT
XSON6
(SOT886)
SOT886Reel 7" Q1/T1, Q3/T4
74LVC1G175GM,115
( 9352 772 08115 )
ActiveYTReel 7” Q1/T1 or Q2/T3

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFEFRIFRMTBF (hour)MSLMSL leadfree
74LVC1G175GM74LVC1G175GM,13274LVC1G175GM123.83.872.58E811
74LVC1G175GM74LVC1G175GM,11574LVC1G175GM123.83.872.58E811
Quality and reliability disclaimer

Documentation (5)

File nameTitleTypeDate
74LVC1G175Single D-type flip-flop with reset; positive edge triggerData sheet2019-10-03
AN10161PicoGate Logic footprintsApplication note2002-10-29
AN10343MicroPak soldering informationApplication note2010-12-30
AN11009Pin FMEA for LVC familyApplication note2019-01-09
lvc1g17574LVC1G175 IBIS modelIBIS model2014-10-20

Support

If you are in need of design/technical support, let us know and fill in the answer form, we'll get back to you shortly.

Models

File nameTitleTypeDate
lvc1g17574LVC1G175 IBIS modelIBIS model2014-10-20

Ordering, pricing & availability

Type numberOrderable part numberOrdering code (12NC)PackingBuy online
74LVC1G175GM74LVC1G175GM,132935277208132Reel 7" Q1/T1, Q3/T4Order product
74LVC1G175GM74LVC1G175GM,115935277208115Reel 7” Q1/T1 or Q2/T3Order product

Sample

As a Nexperia customer you can order samples via our sales organization or directly via our Online Sample Store: https://extranet.nexperia.com.

Sample orders normally take 2-4 days for delivery.

If you do not have a direct account with Nexperia our network of global and regional distributors is available and equipped to support you with Nexperia samples.