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74AVC1T1022

1-to-4 fan-out buffer

The 74AVC1T1022 is a translating 1-to-4 fan-out buffer suitable for use in clock distribution. It has dual supplies (VCC(A) and VCC(B)) for voltage translation. It also has a data input (A), four data outputs (1Yn and 2Yn) and an output enable input (OE). VCC(A) and VCC(B) can be independently supplied at any voltage between 0.8 V and 3.6 V. It makes the device suitable for low voltage translation between any of the following voltages: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V. The levels of A, OE and 1Yn are referenced to VCC(A), outputs 2Yn are referenced to VCC(B). This supply configuration ensures that two of the fanned out signals can be used in level shifting. A HIGH on OE causes all outputs to be pulled LOW via pull-down resistors, a LOW on OE disconnects the pull-down resistors and enables all outputs.

Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time.

The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range:
    • VCC(A): 0.8 V to 3.6 V
    • VCC(B): 0.8 V to 3.6 V
  • Complies with JEDEC standards:
    • JESD8-12 (0.8 V to 1.3 V)
    • JESD8-11 (0.9 V to 1.65 V)
    • JESD8-7 (1.2 V to 1.95 V)
    • JESD8-5 (1.8 V to 2.7 V)
    • JESD8-B (2.7 V to 3.6 V)
  • ESD protection:
    • HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8 kV
    • CDM JESD22-C101E exceeds 1000 V
  • Maximum data rates:
    • 200 Mbit/s (≥ 1.1 V to 2.5 V translation)
    • 200 Mbit/s (≥ 1.1 V to 3.3 V translation)
    • 380 Mbit/s (≥ 1.8 V to 3.3 V translation)
    • 200 Mbit/s (≥ 1.1 V to 1.8 V translation)
    • 150 Mbit/s (≥ 1.1 V to 1.5 V translation)
    • 100 Mbit/s (≥ 1.1 V to 1.2 V translation)
    • Latch-up performance exceeds 100 mA per JESD 78 Class II
    • Specified from -40 °C to +85 °C and -40 °C to +125 °C
    • Multiple package options
    • Inputs accept voltages up to 3.6 V

Parametrics

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)No of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AVC1T1022DPProduction0.8 - 3.60.8 - 3.6CMOS/LVTTL± 124.01very low-40~12518622.594.6TSSOP10
74AVC1T1022GUProduction0.8 - 3.60.8 - 3.6CMOS/LVTTL± 124.01very low-40~125---XQFN10

Package

Type numberPackagePackage informationReflow-/Wave solderingPackingStatusMarkingOrderable part number, (Ordering code (12NC))
74AVC1T1022DP
TSSOP10
(SOT552-1)
SOT552-1SSOP-TSSOP-VSO-WAVE
Reel 13" Q1/T1ActiveB274AVC1T1022DPJ
( 9353 058 31118 )
74AVC1T1022GU
XQFN10
(SOT1160-1)
SOT1160-1Reel 7” Q1/T1 or Q2/T3ActiveB274AVC1T1022GUX
( 9353 058 32115 )

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHS / RHFLeadfree conversion dateEFRIFRMTBF (hour)MSLMSL leadfree
74AVC1T1022DP74AVC1T1022DPJ74AVC1T1022DPAlways Pb-free32.60.91.11E911
74AVC1T1022GU74AVC1T1022GUX74AVC1T1022GUAlways Pb-free32.60.91.11E911
Quality and reliability disclaimer

Documentation (7)

File nameTitleTypeDate
74AVC1T10221-to-4 fan-out bufferData sheet2017-03-16
Nexperia_document_guide_Logic_translatorsNexperia Logic TranslatorsBrochure2021-04-12
avc1t102274AVC1T1022 IBIS modelIBIS model2015-10-25
Nexperia_Selection_guide_2022Nexperia Selection Guide 2022Selection guide2022-01-05
SOT552-1plastic, thin shrink small outline package; 10 leads; 0.5 mm pitch; 3 mm x 3 mm x 1.1 mm bodyPackage information2020-04-21
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT1160-1plastic, leadless extremely thin quad flat package; 10 terminals; 0.4 mm pitch; 1.4 mm x 1.8 mm x 0.5 mm bodyPackage information2020-04-21

Support

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Models

File nameTitleTypeDate
avc1t102274AVC1T1022 IBIS modelIBIS model2015-10-25

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